COP8CCR9LVA7SLASHNOPB datasheet(8/111 Pages) TI1

8 / 111 page

COP8CBR9, COP8CCR9, COP8CDR9

SNOS535I – OCTOBER 2000 – REVISED MARCH 2013

www.ti.com

Additional functions will copy blocks of data between the RAM and the Flash Memory. These functions

provide a virtual EEPROM capability by allowing the user to emulate a variable amount of EEPROM by

initializing nonvolatile variables from the Flash Memory and occasionally restoring these variables to the

Flash Memory.

The contents of the boot ROM have been defined by TI. Execution of code from the boot ROM is

dependent on the state of the FLEX bit in the Option Register on exit from RESET. If the FLEX bit is a

zero, the Flash Memory is assumed to be empty and execution from the boot ROM begins. For further

information on the FLEX bit, refer to Section Option Register.

2.3.3

DUAL CLOCK AND CLOCK DOUBLER

The device includes a versatile clocking system and two oscillator circuits designed to drive a crystal or

ceramic resonator. The primary oscillator operates at high speed up to 10 MHz. The secondary oscillator

is optimized for operation at 32.768 kHz.

The user can, through specified transition sequences (please refer to Power Saving Features), switch

execution between the high speed and low speed oscillators. The unused oscillator can then be turned off

to minimize power dissipation. If the low speed oscillator is not used, the pins are available as general

purpose bidirectional ports.

The operation of the CPU will use a clock at twice the frequency of the selected oscillator (up to 20 MHz

for high speed operation and 65.536 kHz for low speed operation). This doubled clock will be referred to in

this document as ‘MCLK'. The frequency of the selected oscillator will be referred to as CKI. Instruction

execution occurs at one tenth the selected MCLK rate.

2.3.4

TRUE IN-SYSTEM EMULATION

On-chip emulation capability has been added which allows the user to perform true in-system emulation

using final production boards and devices. This simplifies testing and evaluation of software in real

environmental conditions. The user, merely by providing for a standard connector which can be bypassed

by jumpers on the final application board, can provide for software and hardware debugging using actual

production units.

2.3.5

ARCHITECTURE

The COP8 family is based on a modified Harvard architecture, which allows data tables to be accessed

directly from program memory. This is very important with modern microcontroller-based applications,

since program memory is usually ROM or EPROM, while data memory is usually RAM. Consequently

constant data tables need to be contained in non-volatile memory, so they are not lost when the

microcontroller is powered down. In a modified Harvard architecture, instruction fetch and memory data

transfers can be overlapped with a two stage pipeline, which allows the next instruction to be fetched from

program memory while the current instruction is being executed using data memory. This is not possible

with a Von Neumann single-address bus architecture.

The COP8 family supports a software stack scheme that allows the user to incorporate many subroutine

calls. This capability is important when using High Level Languages. With a hardware stack, the user is

limited to a small fixed number of stack levels.

2.3.6

INSTRUCTION SET

In today's 8-bit microcontroller application arena cost/performance, flexibility and time to market are

several of the key issues that system designers face in attempting to build well-engineered products that

compete in the marketplace. Many of these issues can be addressed through the manner in which a

microcontroller's instruction set handles processing tasks. And that's why the COP8 family offers a unique

and code-efficient instruction set - one that provides the flexibility, functionality, reduced costs and faster

time to market that today's microcontroller based products require.

Device Information

Submit Documentation Feedback

Product Folder Links: COP8CBR9 COP8CCR9 COP8CDR9

COP8CCR9LVA7/NOPB bảng dữ liệu(PDF) 8 Page - Texas Instruments

COP8CCR9LVA7/NOPB bảng dữ liệu(HTML) 8 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL