DAC7760IPWPR datasheet(50/63 Pages) TI1

50 / 63 page

DAC7760, DAC8760

SBAS528B – JUNE 2013 – REVISED JUNE 2016

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10 Power Supply Recommendations

The DACx760 family can operate within the specified single-supply range of 10 V to 36 V applied to the AVDD

pin or the specified dual-supply range of 10 V to 18 V applied to AVDD and 0 V to –18 V on AVSS or any

subsequent combination that does not exceed the maximum difference of 36 V between AVDD and AVSS. The

digital supply, DVDD, can operate within the specified supply range of 2.7 V to 5.5 V or be powered by the

internal 4.6-V LDO. Switching power supplies and DC/DC converters often have high-frequency glitches or

spikes riding on the output voltage. In addition, digital components can create similar high frequency spikes. This

noise can be easily coupled into the DAC output voltage or current through various paths between the power

connections and analog output. To further reduce noise, TI recommends including bulk and local decoupling

capacitors. The current consumption on the AVDD and AVSS pins, the short-circuit current limit for the voltage

output, and current ranges for the current output, are listed in Electrical Characteristics. The power supply must

meet the requirements listed in Electrical Characteristics.

11 Layout

11.1 Layout Guidelines

To maximize the performance of the DACx760 in any application, good layout practices and proper circuit design

must be followed. A few recommendations specific to the DACx760 are:

1. As is seen in Figure 93, CAP2 is directly connected to the input of the final IOUT amplifier. Any noise or

unwanted ac signal routed near the CAP1 and/or CAP2 pins could capacitively couple onto internal nodes

and affect IOUT. Therefore, with the QFN package, it is important to avoid routing any digital or HART signal

trace over the CAP1 and CAP2 traces.

2. The thermal PAD must be connected to the lowest potential in the system.

3. The +VSENSE connection must be a low-impedance trace connected close to the point of load.

4. AVDD and AVSS must have decoupling capacitors local to the respective pins.

5. The reference capacitor must be placed close to the reference input pin.

6. Avoid routing switching signals near the reference input.

7. For designs that include protection circuits:

(a) Place diversion elements, such as TVS diodes or capacitors, close to off-board connectors to make sure

that return current from high-energy transients does not cause damage to sensitive devices.

(b) Use large, wide traces to provide a low-impedance path to divert high-energy transients away from I/O

terminals.

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