CS9210 datasheet(8/39 Pages) NSC

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Revision 3.2

Signal Definitions (Continued)

2.2

SIGNAL DESCRIPTIONS

2.2.1

Pixel Port Interface Signals

Signal Name

Pin No.

Type

(Drive)

Description

RED[5:0]

14-9

Red Pixel Channel

These six pins are the red component of the pixel port input. The six

most significant bits of the CS5530 pixel port (FP_DATA[17:12] on an

18-bit pixel port) are connected to these pins. RED5 is the MSB (most

significant bit) and RED0 is the LSB (least significant bit).

GREEN[5:0]

8-4,142

Green Pixel Channel

These six pins are the green component of the pixel port input. The six

middle bits of the CS5530 pixel port (FP_DATA[11:6] on an 18-bit pixel

port) are connected to these pins. GREEN5 is the MSB and GREEN0

is the LSB.

BLUE[5:0]

141-136

Blue Pixel Channel

These six pins are the blue component of the pixel port input. The six

least significant bits of the CS5530 pixel port (FP_DATA[5:0] on an 18-

bit pixel port) are connected to these pins. BLUE5 is the MSB and

BLUE0 is the LSB.

ENA_DISP

135

Active Display Enable

This input is asserted when the pixel data stream is presenting valid

display data to the pixel port.

ENA_VDDIN

134

Input VDD Enable

When this input is asserted, it indicates that the display controller in

the CS9210 should apply voltage to the LCD panel.

ENA_LCDIN

133

Input LCD Enable

When this input is asserted, it indicates that the display controller in

the CS9210 should drive valid control signals to the LCD panel.

DOTCLK

Dot Clock

This signal is the pixel clock from the video controller. It is used to

clock data in from the pixel port. Additionally, this signal is used as the

input clock for the entire CS9210 device. This clock must be running at

all times after reset for the CS9210 to function correctly.

FP_HSYNC

Flat Panel Horizontal Sync Input

When the input data stream is in a horizontal blanking period, this

input is asserted. It is a pulse that is used to synchronize display lines

and to indicate when the pixel data stream is not valid due to blanking.

FP_VSYNC

143

Flat Panel Vertical Sync Input

When the input data stream is in a vertical blanking period, this input is

asserted. It is a pulse used to synchronize display frames and to indi-

cate when the pixel data stream is not valid due to blanking.

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