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TAS3103DBT bảng dữ liệu(PDF) 35 Page - Texas Instruments

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tên linh kiện TAS3103DBT
Giải thích chi tiết về linh kiện  Digital Audio Processor With 3D Effects
PDF  146 Pages
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nhà sản xuất  TI [Texas Instruments]
Trang chủ  http://www.ti.com
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TAS3103DBT bảng dữ liệu(HTML) 35 Page - Texas Instruments

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2−3
2.1
Input and Output Serial Audio Ports (SAPs)
The TAS3103 accepts data in various serial data formats including left/right justified and I2S, 16 through 32 bits,
discrete, or TDM. Sample rates from 8 kHz through 96 kHz are supported. Each TAS3103 has four input serial ports
and three output serial ports, labeled SDIN[4:1] and SDOUT[3:1] respectively. All ports accommodate stereo data
formats, and SDIN1 and SDOUT1 also accommodate time-division multiplex (TDM) data formats. The formats are
selectable via I2C commands. All input channels are assigned the same format and all output channels are assigned
the same format; and the two formats need not be the same. The TAS3103 can accommodate system architectures
that require data format conversions without the need for additional glue logic. If a TDM format is selected for the input
port, only SDIN1 is active; the other three input channels cannot be used. If a TDM format is selected for the output
port, only SDOUT1 is active; the other two channels cannot be used.
2.1.1
SAP Configuration Options
The TAS3103 serial interface data format options for discrete (stereo) data are detailed in Figure 2−2.
Left / Right
Justified
LRCLK
SCLK
MSB−1
LSB
LSB
Left Justified
LSB
LSB+1
LSB+1
Right Justified
LSB
LSB+1
Bit 31
Bit 0
Bit 31
Bit 0
Bit 31
SCLK
LSB
Bit 0
Bit 31
Bit 31
MSB
Bit 0
SCLK
Bit 31
Bit 31
Bit 0
Bit 0
Bit 31
Bit 31
Bit 0
MSB
I2S
I2S
MSB−1
MSB
MSB−1
MSB
MSB−1
MSB
MSB−1
MSB
LSB+1
LSB
LSB+1
MSB−1
MSB
MSB−1
MSB
Figure 2−2. Discrete Serial Data Formats
When the TAS3103 is transmitting serial data, it uses the negative edge of SCLK to output a new data bit. The
TAS3103 samples incoming serial data on the rising edge of SCLK.
The TDM modes on the TAS3103 only provide left justified and I2S formats, and each word in the TDM data stream
adheres to the bit placement shown in Figure 2−2. Figure 2−3 illustrates the output data stream for a 4-channel TDM
mode. Two cases are illustrated; an I2S data format case (SAP output mode 1010) and a left-justified data format case
(SAP output mode 0111).
MSB−1
LSB
LSB
LSB
LSB
MSB
Left
LRCLK
Data
LRCLK
Data
Justified
MSB
MSB−1
MSB
MSB−1
MSB
MSB−1
MSB
LSB
LSB
LSB
LSB
MSB−1
MSB
I2S
Left Channel 1
Left Channel 2
Right Channel 1
Right Channel 2
Left Channel 1
Left Channel 2
Right Channel 1
Right Channel 2
MSB−1
MSB
MSB−1
MSB
MSB−1
MSB
Figure 2−3. Four-Channel TDM Serial Data Formats



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