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CSD85302LT bảng dữ liệu(PDF) 1 Page - Texas Instruments |
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CSD85302LT bảng dữ liệu(HTML) 1 Page - Texas Instruments |
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1 / 13 page ![]() VGS - Gate-to-Source Voltage (V) 0 1 2 3 4 5 6 7 8 9 10 0 6 12 18 24 30 36 42 48 54 60 D007 TC = 25°C, I S = 2 A TC = 125°C, I S = 2 A Qg - Gate Charge (nC) 0 2 4 6 8 10 12 0 1 2 3 4 5 6 7 8 D004 IS1S2 = 2 A VS1S2 = 10 V Gate 2 Source 2 Gate 1 Source 1 G1 G2 S2 S1 Product Folder Sample & Buy Technical Documents Tools & Software Support & Community CSD85302L SLPS561 – NOVEMBER 2015 CSD85302L 20 V Dual N-Channel NexFET™ Power MOSFET Text added for spacing 1 Features 1 • Common Drain Configuration Product Summary • Low On-Resistance TA = 25°C TYPICAL VALUE UNIT • Small Footprint of 1.35 mm × 1.35 mm VS1S2 Source-to-Source Voltage 20 V Qg Gate Charge Total (4.5 V) 6 nC • Pb Free and Halogen Free Qgd Gate Charge Gate-to-Drain 1.4 nC • RoHS Compliant VGS = 2.5 V 29 m Ω • ESD HBM Protection >2.5 kV RS1S2(on) Source-to-Source On-Resistance VGS = 4.5 V 20 m Ω VGS = 6.5 V 18.7 m Ω 2 Applications VGS(th) Threshold Voltage 0.9 V • USB Type-C/PD • Battery Management Ordering Information(1) • Battery Protection DEVICE QTY MEDIA PACKAGE SHIP CSD85302L 3000 7-Inch 1.35 × 1.35 mm Land Grid Tape and Reel Array (LGA) Package Reel 3 Description CSD85302LT 250 This 20 V, 18.7 m Ω, 1.35 mm × 1.35 mm LGA Dual (1) For all available packages, see the orderable addendum at NexFET™ power MOSFET is designed to minimize the end of the data sheet. resistance in the smallest footprint. Its small footprint and common drain configuration make the device Absolute Maximum Ratings ideal for battery-powered applications in small TA = 25°C VALUE UNIT handheld devices. VS1S2 Source-to-Source Voltage 20 V VGS Gate-to-Source Voltage ±10 V Top View IS Continuous Source Current(1) 7 A ISM Pulsed Source Current(2) 37 A PD Power Dissipation(1) 1.7 W V(ESD) Human Body Model (HBM) 2.5 kV TJ, Operating Junction and –55 to 150 °C Tstg Storage Temperature Range (1) Typical RθJA = 75°C/W when mounted on a 1 inch 2, 2 oz. Cu pad on a 0.06 inch thick FR4 PCB. Configuration (2) Max RθJA = 90°C/W, pulse duration ≤100 μs, duty cycle ≤1% . . RDS(on) vs VGS Gate Charge 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. |
Số phần tương tự - CSD85302LT |
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Mô tả tương tự - CSD85302LT |
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