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BQ76PL536APAPR bảng dữ liệu(PDF) 54 Page - Texas Instruments

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tên linh kiện BQ76PL536APAPR
Giải thích chi tiết về linh kiện  Cell Lithium-Ion Battery Monitor and Secondary Protection IC
PDF  74 Pages
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nhà sản xuất  TI1 [Texas Instruments]
Trang chủ  http://www.ti.com
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bq76PL536A
SLUSAD3B – JUNE 2011 – REVISED JANUARY 2016
www.ti.com
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The bq76PL536A is a series-cell Lithium-Ion battery monitor and secondary protector for Uninterruptible Power
Systems (UPS), E-Bikes and Scooters, Large-Format Battery Systems, and so forth. To allow for optimal
performance in the end application, special consideration must be taken to ensure minimization of measurement
error through proper printed circuit board (PCB) layout.
8.1.1 Anti-Aliasing Filter
An anti-aliasing filter is required for each VCn input VC6–VC1, consisting of a 1-k
Ω, 1% series resistor and 100-
nF capacitor. Good-quality components should be used. A 1% resistor is recommended, because the resistor
creates a small error by forming a voltage divider with the input impedance of the part. The part is factory-
trimmed to compensate for the error introduced by the filter.
8.1.2 Host SPI Interface Pin States
The CS_H pin is active-low. The host asserts the pin to a logic zero to initiate communications. The CS pin
should remain low until the end of the current packet. When the CS_H pin is asserted, the SPI receiver and
interface of the device are reset and resynchronized. This action ensures that a slave device that has lost
synchronization during a previous transmission or as the result of noise on the bus does not remain permanently
hung. CS_H must be driven false (high) between packets; see Timing Characteristics – AC SPI Data Interface for
timing details.
54
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