AD8285CP-EBZ datasheet(22/27 Pages) AD

22 / 27 page

AD8285

Data Sheet

Rev. B | Page 22 of 27

Table 9. Memory Map Register

Addr.

(Hex)

Bit 7

(MSB)

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

(LSB)

Default

Value

Default

Notes/

Comments

Chip Configuration Registers

0x00

CHIP_PORT_CONFIG

LSB first,

1 = on,

0 = off,

(default)

Soft

reset,

1 = on,

0 = off

(default)

Soft

reset,

1 = on,

0 = off

(default)

LSB first,

1 = on,

0 = off

(default)

0x18

Mirror the

nibbles so

that LSB- or

MSB-first

mode is set

correct

regardless of

shift mode.

0x01

CHIP_ID

Chip ID, Bits[7:0]

(AD8285 = 0xA2, default)

Read

only

The default

value is the

chip ID

assigned to

the AD8285.

This is a read-

only register.

Device Index and Transfer Registers

0x05

DEVICE_INDEX

Data

Chan-

nel D,

1 = on

(def-

ault),

0 = off

Data

Chan-

nel C,

1 = on

(def-

ault),

0 = off

Data

Channel

1 = on

(default),

0 = off

Data

Channel

1 = on

(default),

0 = off

0x0F

Bits are set to

determine

which on-

chip device

receives the

next write

command.

0xFF

DEVICE_UPDATE

transfer,

1 = on,

0 = off

(default)

0x00

Synchronously

transfers data

from the

master shift

slave.

Channel Functions Registers

0x04

FLEX_RES

Reserved

0x0F

Reserved. Bits

must be set

to 0x00.

0x08

GLOBAL_MODES

Internal power-

down mode,

00 = chip run

(default),

01 = full power-

down,

11 = reset

0x00

Determines

the power-

down mode

(global).

0x09

GLOBAL_CLOCK

Duty

cycle

stabilizer,

1 = on

(default),

0 = off

0x01

Turns the

internal duty

cycle stabilizer

on and off

(global).

0x0C

FLEX_MUX_CONTROL

Power-

down of

unused

channels,

0 = PD

(power-

down;

default),

1 =

power-on

Mux input active channels,

0000 = A,

0001 = AUX,

0010 = A and B,

0011 = A and AUX,

0100 = A, B, and C,

0101 = A, B, and AUX,

0110 = A, B, C, and D,

0111 = A, B, C, and AUX

0x00

Selects the

mux input

channels to

use and

specifies

whether to

power down

unused

channels.

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