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AD8285CP-EBZ bảng dữ liệu(PDF) 14 Page - Analog Devices

tên linh kiện AD8285CP-EBZ
Giải thích chi tiết về linh kiện  Radar Receive Path AFE - 4-Channel LNA/PGA/AAF with ADC
PDF  27 Pages
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nhà sản xuất  AD [Analog Devices]
Trang chủ  http://www.analog.com
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AD8285CP-EBZ bảng dữ liệu(HTML) 14 Page - Analog Devices

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AD8285
Data Sheet
Rev. B | Page 14 of 27
THEORY OF OPERATION
RADAR RECEIVE PATH AFE
The primary application for the AD8285 is a high speed ramp,
frequency modulated, continuous wave radar (HSR-FMCW radar).
Figure 24 shows a simplified block diagram of an HSR-FMCW
radar system. The signal chain requires multiple channels, each
including a LNA, a PGA, an AAF, and an ADC with a 12-bit
parallel output. The AD8285 provides all of these key components
in a single 10 × 10 LFCSP package.
The performance of each component is designed to meet the
demands of an HSR-FMCW radar system. Some examples of
these performance metrics are the LNA noise, PGA gain range,
AAF cutoff characteristics, and ADC sample rate and resolution.
The AD8285 includes a multiplexer (mux) in front of the ADC
as a cost saving alternative to having an ADC for each channel.
The mux automatically switches between each active channel
after each ADC sample. The DSYNC output indicates when
Channel A data is at the ADC output and when data for each
active channel follows sequentially with each clock cycle.
The effective sample rate for each channel is reduced by a factor
equal to the number of active channels. The ADC resolution of
12 bits with up to 72 MSPS sampling satisfies the requirements
for most HSR-FMCW approaches.
Figure 24. Simplified Block Diagram of a Single Channel
Figure 25. Radar System Overview
MUX
AD8285
MUX
CONTROLLER
SPI
INTERFACE
SDIO
SCLK
AAF
PGA
LNA
PIPELINE
ADC
THIRD-ORDER
ELLIPTICAL FILTER
–6dB,
0dB,
6dB,
12dB
12-BIT
72MSPS
INx+
INx–
22dB
200Ω/
200kΩ
PARALLEL
3.3V CMOS
D11 TO D0
DSYNC
PA
DSP
ANTENNA
VCO
12-BIT
ADC
AAF
AAF
AAF
PGA
LNA
PGA
LNA
PGA
LNA
AD8285
MUX
REF.
OSCILLATOR
CHIRP RAMP
GENERATOR



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