UT04VS33P datasheet(9/21 Pages) AEROFLEX

9 / 21 page

AC CHARACTERISTICS READ CYCLE (Post-Radiation)*

(VDD = 3.0V to 3.6V; -55C < TC < +125C)

Notes:

*Post-radiation performance guaranteed at 25oC per MIL-STD-883 Method 1019 at 300 krad(Si).

1. Guaranteed by design but not tested

Figure 3: Test Circuit Load used for AC timing

SYMBOL

PARAMETER

CONDITION

MIN

MAX

UNIT

tDELAY+

VIN+ to VOUT propagation delay

VIN rising, CDLY open

s

tDELAY+

VIN+ to VOUT propagation delay

VIN rising, Cdly capacitance value on

CDLYx=112pF (Figure 3, Test

Circuit Load)

263

s

tDELAY-

VIN- to VOUT propagation delay

VIN falling

s

tRP

Reset timeout period

CRESET open

170

s

tRP

Reset timeout period

Creset capacitance value on CRESET

=65pF (Figure 3, Test Circuit Load)

100

283

s

tON

EN+ to VOUT propagation delay

EN rising to VOUT going high

CDLY open

s

tON

EN+ to VOUT propagation delay

EN rising to VOUT going high, Cdly

capacitance value on CDLYx=112PF

(Figure 3, Test Circuit Load)

263

s

tOFF

EN- to VOUT propagation delay

EN falling to VOUT deasserted

s

tMRST

MRB- to RESET/RESETB

propagation delay

MRB falling to RESET/RESETB

asserted

s

tMPW

Minimum MRB Input pulse width

2.5

s

tMRP

MRB+ to RESET/RESETB

propagation delay

MRB rising to RESET/RESETB

deasserted

s

tRST_DELAY

VINx- to RESET/RESETB asserted

VIN falling

s

tGLITCH

ENx or MRB glitch rejection

270

tGLITCH_VINx

VINx glitch rejection

800

Zo = 50-ohms

VDD

Test

Point

DUT

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