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VD5377 bảng dữ liệu(PDF) 64 Page - STMicroelectronics

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I2C interface
VD5377
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Doc ID 022952 Rev 2
11
I2C interface
The interface is 400 kHz I2C, with very fast polling rate for high CPI applications (down to
1ms period).
11.1
Protocol
Figure 28. Serial interface data transfer protocol
11.2
Data format
Information is packed in 8-bit packets (bytes) always followed by an acknowledge bit. The
internal data is produced by sampling SDA at a rising edge of SCL. The external data must
be stable during the high period of SCL. The exceptions to this are start (S) or stop (P)
conditions when SDA falls or rises respectively, while SCL is high.
The first byte contains the device address byte which includes the data direction read (R),
~write (W), bit.
Figure 29. VD5377 serial interface address
The byte following the address byte contains the address of the first data byte (also referred
to as the index).
12
7
8
A
Start condition
Stop condition
SDA
SCL
Acknowledge
P
S
3
4
56
Address or data byte
MSB
LSB
1
0
1
0
0
1
1
R/W



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