STAP16DPPS05XTTR datasheet(13/33 Pages) STMICROELECTRONICS

tên linh kiện	STAP16DPPS05XTTR

Giải thích chi tiết về linh kiện	Low voltage 16-bit constant current LED sink driver

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STAP16DPPS05

Timing diagrams

Note:

OUTn = ON when Dn = H OUTn = OFF when Dn = L.

Figure 7. Timing diagram

Note:

Latch and output enable terminals are level-sensitive and are not synchronized with rising or

falling edge of LE/DM1 signal. When LE/DM1 terminal is low level, the latch circuit holds

previous set of data. When LE/DM1 terminal is high level, the latch circuit refreshes new set

of data from SDI chain. When OE/DM2 terminal is at low level, the output terminals Out 0 to

Out 15 respond to data in the latch circuits, either ‘1’ ON or ‘0’ OFF. When OE/DM2 terminal

is at high level, all output terminals are switched OFF.

Table 9. Truth table

CLOCK

LE/DM1

OE/DM2

SERIAL-IN

OUT0............. OUT7................ OUT15

SDO

Dn ..... Dn - 7 ..... Dn -15

Dn - 15

Dn + 1

No change

Dn - 14

Dn + 2

Dn + 2 ..... Dn - 5 ..... Dn -13

Dn - 13

Dn + 3

Dn + 2 ..... Dn - 5 ..... Dn -13

Dn - 13

Dn + 3

OFF

Dn - 13

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