M95040-DRDW3TP datasheet(27/41 Pages) STMICROELECTRONICS

27 / 41 page

DocID024225 Rev 6

27/41

M95040-A125 M95040-A145

Delivery state

The device is delivered with:

•

the memory array set to all 1s (each byte = FFh),

•

Status register: bit BP1 =0 and BP0 =0,

•

Identification page: the first three bytes define the Device identification code (value

defined in Table 4). The content of the following bytes is Don’t Care.

Absolute maximum ratings

Stressing the device outside the ratings listed in Table 7 may cause permanent damage to

the device. These are stress ratings only, and operation of the device at these, or any other

conditions outside those indicated in the operating sections of this specification, is not

implied. Exposure to absolute maximum rating conditions for extended periods may affect

device reliability.

Table 7. Absolute maximum ratings

Symbol

Parameter

Min.

Max.

Unit

TSTG

Storage temperature

–65

150

°C

TAMR

Ambient operating temperature

–40

150

°C

TLEAD

Lead temperature during soldering

See note (1)

1. Compliant with JEDEC Std J-STD-020D (for small body, Sn-Pb or Pb-free assembly), the ST ECOPACK®

7191395 specification, and the European directive on Restrictions of Hazardous Substances (RoHS

directive 2011/65/EU of July 2011).

°C

Voltage on Q pin

–0.50

VCC+0.6

Input voltage

–0.50

6.5

IOL

DC output current (Q = 0)

IOH

DC output current (Q = 1)

VCC

Supply voltage

–0.50

6.5

VESD

Electrostatic pulse (Human Body Model)(2)

2. Positive and negative pulses applied on pin pairs, in accordance with AEC-Q100-002 (compliant with

ANSI/ESDA/JEDEC JS-001-2012, C1=100 pF, R1=1500

Ω, R2=500 Ω)

-4000

M95040-DRDW3TP bảng dữ liệu(PDF) 27 Page - STMicroelectronics

M95040-DRDW3TP bảng dữ liệu(HTML) 27 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

bảng dữ liệu tải về

Link URL