M24C02-DRMF8TP datasheet(21/41 Pages) STMICROELECTRONICS

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M24C02-DRE

Instructions

4.2.2

Current Address Read

For the Current Address Read operation, following a Start condition, the bus master only

sends a device select code with the R/W bit set to 1. The device acknowledges this, and

outputs the byte pointed by the internal address counter. The counter is then incremented.

The bus master terminates the transfer with a Stop condition, as shown in Figure 8, without

acknowledging the byte.

Note that the address counter value is defined by instructions accessing either the memory

or the Identification page. When accessing the Identification page, the address counter

value is loaded with the Identification page byte location, when accessing the memory, it is

safer to always use the Random Address Read instruction (this instruction loads the

address counter with the byte location to read in the memory) instead of the Current

Address Read instruction.

4.2.3

Sequential Read

A sequential Read can be used after a Current Address Read or a Random Address Read.

After a Read instruction, the device can continue to output the next byte(s) in sequence if

the bus master sends additional clock pulses and if the bus master does acknowledge each

transmitted data byte. To terminate the stream of bytes, the bus master must not

acknowledge the last byte, and must generate a Stop condition, as shown in Figure 8.

The sequential read is controlled with the device internal address counter which is

automatically incremented after each byte output. After the last memory address, the

address counter “rolls-over”, and the device continues to output data from memory address

00h.

4.2.4

Read Identification Page

The Identification Page can be read by issuing a Read Identification Page instruction. This

instruction uses the same protocol and format as the Random Address Read (from memory

array) with device type identifier defined as 1011b. The most significant address bits A7/A4

are don't care except bit A7 which must be 0, the least significant address bits A3/A0 define

the byte location inside the Identification page. The number of bytes to read in the ID page

must not exceed the page boundary.

4.2.5

Read the lock status

The locked/unlocked status of the Identification page can be checked by transmitting a

specific truncated command [Identification Page Write instruction + one data byte] to the

device. The device returns an acknowledge bit after the data byte if the Identification page is

unlocked, otherwise a NoAck bit if the Identification page is locked.

Right after this, it is recommended to transmit to the device a Start condition followed by a

Stop condition, so that:

•

Start: the truncated command is not executed because the Start condition resets the

device internal logic,

•

Stop: the device is then set back into Standby mode by the Stop condition.

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