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RPC564L60L5BFSR bảng dữ liệu(PDF) 27 Page - STMicroelectronics |
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RPC564L60L5BFSR bảng dữ liệu(HTML) 27 Page - STMicroelectronics |
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27 / 137 page ![]() DocID026934 Rev 1 27/137 RPC56EL60L5 Introduction 136 Individual software control for each PWM output All outputs can be forced to a value simultaneously PWMX pin can optionally output a third signal from each channel Channels not used for PWM generation can be used for buffered output compare functions Channels not used for PWM generation can be used for input capture functions Enhanced dual edge capture functionality Option to supply the source for each complementary PWM signal pair from any of the following: – External digital pin – Internal timer channel – External ADC input, taking into account values set in ADC high- and low-limit registers DMA support 1.5.31 eTimer module The MPC5643L provides three eTimer modules (on the LQFP package eTimer_2 is available internally only without any external I/O access). Six 16-bit general purpose up/down timer/counters per module are implemented with the following features: Maximum clock frequency of 120 MHz Individual channel capability – Input capture trigger – Output compare – Double buffer (to capture rising edge and falling edge) – Separate prescaler for each counter – Selectable clock source – 0–100% pulse measurement – Rotation direction flag (Quad decoder mode) Maximum count rate – Equals peripheral clock divided by 2 for external event counting – Equals peripheral clock for internal clock counting Cascadeable counters Programmable count modulo Quadrature decode capabilities Counters can share available input pins Count once or repeatedly Preloadable counters Pins available as GPIO when timer functionality not in use DMA support 1.5.32 Sine Wave Generator (SWG) A digital-to-analog converter is available to generate a sine wave based on 32 stored values for external devices (ex: resolver). |
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