L7292 datasheet(26/60 Pages) STMICROELECTRONICS

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I2C interface

L7292

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DocID028601 Rev 1

Figure 8. Multi-write

8.3.9

Read operations

Following a Start condition the bus master sends a device select code with the Read/Write

bit (RW) set to 1. After the successful completion of a Read operation, the device's internal

address counter is incremented by one, to point to the next register address.

8.3.10

Random Address Read

A dummy Write is first performed to load the address into this address counter but without

sending a Stop condition. Then, the bus master sends another Start condition, and repeats

the device select code, with the Read/Write bit (RW) set to 1. The device acknowledges this,

and outputs the contents of the addressed byte. The bus master must not acknowledge the

byte, and terminates the transfer with a Stop condition or a repeated Start condition.

8.3.11

Current Address Read

For the Current Address Read operation, following a Start condition, the bus master only

sends a device select code with the Read/Write bit (RW) set to 1. The device acknowledges

this, and outputs the byte addressed by the internal address counter. The counter is then

incremented. The bus master terminates the transfer with a Stop condition or a repeated

Start condition, without acknowledging the byte.

8.3.12

Sequential Read

This operation can be used after a Current Address Read or a Random Address Read. The

bus master does acknowledge the data byte output, and sends additional clock pulses so

that the device continues to output the next byte in sequence. To terminate the stream of

bytes, the bus master must not acknowledge the last byte, and must generate a Stop

condition or a repeated Start condition. The output data comes from consecutive addresses,

with the internal address counter automatically incremented after each byte output.

After the last memory address, the address counter “rolls-over”, and the device continues to

output data from the memory address 00h.

8.3.13

Acknowledge in Read mode

For all Read commands, the device waits, after each byte read, for an acknowledgment

during the 9th bit time. If the bus master does not drive Serial Data (SDA) low during this

time, the device terminates the data transfer.

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