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LAN9730 bảng dữ liệu(PDF) 106 Page - Microchip Technology |
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LAN9730 bảng dữ liệu(HTML) 106 Page - Microchip Technology |
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106 / 222 page ![]() LAN9730/LAN9730i DS00001946A-page 106 2012-2015 Microchip Technology Inc. 4.12.1 DETECTING WAKEUP EVENTS The following sections illustrate and discuss the wakeup detection logic. 4.12.1.1 Wake Detection Logic A simplified diagram of the wake event detection logic is shown in Figure 4-30. The functionality of GPIOs 0-6 and GPIOs 8-10 is slightly different. The functionality of GPIO7 is similar to that of GPIOs 0-6, with the additional requirement that it must cause a wakeup event when enabled for use in PHY Link Up detection. GPIOs 8-10 are available for use in both internal and external Ethernet PHY mode of operation. Their functionality is depicted in Figure 4-33. FIGURE 4-30: WAKE EVENT DETECTION BLOCK DIAGRAM Note: Diagram does not represent actual hardware implementation. Note: GPIOs 0-7 are only available for use during internal Ethernet PHY mode of operation. The functionality of GPIOs 0-6 is depicted in Figure 4-31, while that of GPIO7 is shown in Figure 4-32. WOL_EN (PMT_CTL Register) RW WUPS[1] (PMT_CTL Register) SUSPEND0 ED_EN (PMT_CTL Register) RW WUPS[0] (PMT_CTL Register) MPEN (WUSCR Register) RW MPR (WUSCR Register) GPIO0_DET . . . remote_wake PFDA_EN (WUSCR Register) RW BCAST_EN (WUSCR Register) RW Good Frame Received SUSPEND1 SUSPEND2 SUSPEND3 GUEN (WUSCR Register) RW GPIO10_DET MP detect BCAST_FR (WUCSR Register) BCast detect PFDA_FR (WUSCR Register) PFDA detect WUFR (WUSCR Register) WU detect GU detect WUEN (WUSCR Register) RW |
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