DLPR910 datasheet(6/16 Pages) TI1

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DLPR910

DLPS065A – SEPTEMBER 2015 – REVISED OCTOBER 2015

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6.6 Supply Voltage Requirements for Power-On Reset and Power-Down

(see

(1))

MIN

MAX

UNIT

TVCC

VCCINT rise time from 0 V to nominal voltage

(2)

0.2

VCCPOR

POR threshold for VCCINT supply

0.5

–

TOER

OE/RESET release delay following POR (3)

0.5

VCCPD

Power-down threshold for VCCINT supply

–

0.5

Time required to trigger a device reset when the VCCINT supply drops below

TRST

–

the maximum VCCPD threshold

(1)

VCCINT, VCCO, and VCCJ supplies can be applied in any order.

(2)

At power up, the device requires the VCCINT power supply to monotonically rise to the nominal operating voltage within the specified

TVCC rise time. If the power supply cannot meet this requirement, then the device might not perform power-on-reset properly. See Figure

6, in the Xilinx XCF16P (v2.18) Product Specification for more information.

(3)

If the VCCINT and VCCO supplies do not reach their respective recommended operating conditions before the OE/RESET pin is released,

then the configuration data from the PROM is not available at the recommended threshold levels. The configuration sequence must be

delayed until both VCCINT and VCCO have reached their recommended operating conditions.

6.7 Timing Requirements

Refer to the XCF16P product specifications at www.xilinx.com.

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