DLPC3433CZVB datasheet(33/62 Pages) TI1

33 / 62 page

DLPC3433, DLPC3438

www.ti.com

DLPS035B – FEBRUARY 2014 – REVISED JANUARY 2016

•

A read status register (RDSR) instruction (repeated as needed) to poll the write enable latch (WEL) bit

•

After the write enable latch (WEL) bit is set, the program or erase instruction is executed

•

Note the flash automatically clears the write enable status after each program and erase instruction

The specific instruction OpCode and timing compatibility requirements are listed in Table 7 and Table 6. Note

however that DLPC343x does not read the flash’s electronic signature ID and thus cannot automatically adapt

protocol and clock rate based on the ID.

Table 5. SPI Flash Instruction OpCode and Access Profile Compatibility Requirements

FIRST BYTE

SECOND

SPI FLASH COMMAND

THIRD BYTE

FOURTH BYTE

FIFTH BYTE

SIXTH BYTE

(OPCODE)

BYTE

Fast READ (1 Output)

0x0B

ADDRS(0)

ADDRS(1)

ADDRS(2)

dummy

DATA(0)(1)

Read status

0x05

n/a

STATUS(0)

Write status

0x01

STATUS(0)

(2)

Write enable

0x06

Page program

0x02

ADDRS(0)

ADDRS(1)

ADDRS(2)

DATA(0)(1)

Sector erase (4KB)

0x20

ADDRS(0)

ADDRS(1)

ADDRS(2)

Chip erase

0xC7

(1)

Only the first data byte is show, data continues

(2)

DLPC343x does not support access to a second/ expansion Write Status byte

The specific and timing compatibility requirements for a DLPC343x compatible flash are listed in Table 6 and

Table 7.

Table 6. SPI Flash Key Timing Parameter Compatibility Requirements(1)(2)

SPI FLASH TIMING PARAMETER

SYMBOL

ALTERNATE SYMBOL

MIN

MAX

UNIT

Access frequency (all commands)

ƒC

≤1.42

MHz

Chip select high time (also called chip select deselect

tSHSL

tCSH

≤200

time)

Output hold time

tCLQX

tHO

≥0

Clock low to output valid time

tCLQV

≤ 11

Data in set-up time

tDVCH

tDSU

≤5

Data in hold time

tCHDX

tDH

≤5

(1)

The timing values are related to the specification of the flash device itself, not the DLPC343x.

(2)

The DLPC343x does not drive the HOLD or WP (active low write protect) pins on the flash device, and thus these pins should be tied to

a logic high on the PCB through an external pullup.

The DLPC343x supports 1.8-, 2.5-, or 3.3-V serial flash devices. To do so, VCC_FLSH must be supplied with the

corresponding voltage. Table 7 contains a list of 1.8-, 2.5-, and 3.3-V compatible SPI serial flash devices

supported by DLPC343x.

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