CAP1166 datasheet(41/79 Pages) MICROCHIP

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CAP1166

DS00001621B-page 41

 2015 Microchip Technology Inc.

6.10

Averaging and Sampling Configuration Register

The Averaging and Sampling Configuration register controls the number of samples taken and the total sensor input

cycle time for all active sensor inputs while the device is functioning in Active state.

Bits 6 - 4 - AVG[2:0] - Determines the number of samples that are taken for all active channels during the sensor cycle

as shown in Table 6-18. All samples are taken consecutively on the same channel before the next channel is sampled

and the result is averaged over the number of samples measured before updating the measured results.

For example, if CS1, CS2, and CS3 are sampled during the sensor cycle, and the AVG[2:0] bits are set to take 4 samples

per channel, then the full sensor cycle will be: CS1, CS1, CS1, CS1, CS2, CS2, CS2, CS2, CS3, CS3, CS3, CS3.

Bits 3 - 2 - SAMP_TIME[1:0] - Determines the time to take a single sample as shown in Table 6-19.

Bits 1 - 0 - CYCLE_TIME[1:0] - Determines the overall cycle time for all measured channels during normal operation as

shown in Table 6-20. All measured channels are sampled at the beginning of the cycle time. If additional time is remain-

ing, then the device is placed into a lower power state for the remaining duration of the cycle.

TABLE 6-17:

AVERAGING AND SAMPLING CONFIGURATION REGISTER

ADDR

R/W

Default

24h

R/W

Averaging and

Sampling Config

AVG[2:0]

SAMP_TIME[1:0]

CYCLE_TIME

[1:0]

39h

TABLE 6-18:

AVG BIT DECODE

AVG[2:0]

Number of Samples Taken per

Measurement

8 (default)

128

TABLE 6-19:

SAMP_TIME BIT DECODE

SAMP_TIME[1:0]

Sample Time

320us

640us

1.28ms (default)

2.56ms

TABLE 6-20:

CYCLE_TIME BIT DECODE

CYCLE_TIME[1:0]

Overall Cycle Time

35ms

70ms (default)

105ms

140ms

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