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CDCL1810RGZR bảng dữ liệu(PDF) 13 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  Output, High-Performance Clock Distributor
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CDCL1810
www.ti.com
SLLS781D – FEBRUARY 2007 – REVISED NOVEMBER 2014
9.6 Programming
9.6.1 SDA/SCL Interface
This section describes the SDA/SCL interface of the CDCL1810 device. The CDCL1810 operates as a slave
device of the industry standard 2-pin SDA/SCL bus. It operates in the fast-mode at a bit-rate of up to 400 kbit/s
and supports 7-bit addressing compatible with the popular 2-pin serial interface standard.
9.6.1.1 SDA/SCL Bus Slave Device Address
A6
A5
A4
A3
A2
A1
A0
R/W
1
1
0
1
0
ADD1
ADD0
0/1
The device address is made up of the fixed internal address, 11010 (A6:A2), and configurable external pins
ADD1 (A1) and ADD0 (A0). Four different devices with addresses 1101000, 1101001, 1101010 and 1101011,
can be addressed via the same SDA/SCL bus interface. The least significant bit of the address byte designates a
write or read operation.
R/W Bit:
0 = write to CDCL1810 device
1 = read from CDCL1810 device
9.6.1.2 Command Code Definition
BIT
DESCRIPTION
C7
1 = Byte Write / Read or Word Write / Read operation
(C6:C0)
Byte Offset for Byte Write / Read and Word Write / Read operation.
COMMAND CODE for Byte Write / Read
HEX
OPERATION
CODE
C7
C6
C5
C4
C3
C2
C1
C0
byte 0
80h
1
0
0
0
0
0
0
0
byte 1
81h
1
0
0
0
0
0
0
1
byte 2
82h
1
0
0
0
0
0
1
0
byte 3
83h
1
0
0
0
0
0
1
1
byte 4
84h
1
0
0
0
0
1
0
0
byte 5
85h
1
0
0
0
0
1
0
1
byte 6
86h
1
0
0
0
0
1
1
0
COMMAND CODE for Word Write / Read
HEX
OPERATION
CODE
C7
C6
C5
C4
C3
C2
C1
C0
word 0: byte 0 and byte 1
80h
1
0
0
0
0
0
0
0
word 1: byte 1 and byte 2
81h
1
0
0
0
0
0
0
1
word 2: byte 2 and byte 3
82h
1
0
0
0
0
0
1
0
word 3: byte 3 and byte 4
83h
1
0
0
0
0
0
1
1
word 4: byte 4 and byte 5
84h
1
0
0
0
0
1
0
0
word 5: byte 5 and byte 6
85h
1
0
0
0
0
1
0
1
word 6: byte 6 and byte 7
86h
1
0
0
0
0
1
1
0
Copyright © 2007–2014, Texas Instruments Incorporated
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Product Folder Links: CDCL1810



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