Analog Integrated Circuit Device Data



23

Freescale Semiconductor

BC3770

Figure 12. Thermal Regulation

5.4.5

Weak Battery Detection

A weak battery detection function allows the processor to acknowledge the low-battery condition. To prevent false voltage transients from

interrupting the processor unnecessarily, the out-of-range condition must stay at least for the deglitch time of 27 ms, before an interrupt

is generated. If the battery voltage goes back in range before the deglitch time, no corresponding interrupt is generated.

5.4.6

DC-DC PWM Converter

The device features an integrated fixed 1.5 MHz frequency. The device uses a peak current mode PWM controller to regulate the output

voltage and battery charge current. The low-side FET (Q3) also has a current limit that decides if the PWM controller can operate in boost

mode. The threshold is set to 100 mA and turns off the high-side N-channel FET (Q2) before the current reverses, preventing the battery

from discharging.

5.4.7

INTERRUPT

The device uses the Interrupt pin, INTB, to indicate if the status on the device has changed. The Interrupt is asserted whenever one or

more interrupt events are detected in its operation. The processor reads the interrupt registers to see the source of interrupt event(s).

Interrupt bit(s) is (are) only cleared by reading all or some corresponding bits in the interrupt registers. If an interrupt bit is masked in an

interrupt event, the corresponding interrupt bit is still set to 1 in the corresponding register. However, the INTB interrupt pin is not asserted

to low. When the corresponding mask bit is set to “0” because of an earlier interrupt event, the interrupt pin for the corresponding interrupt

processor reads a corresponding interrupt bit, the corresponding interrupt bit is no longer set to “1”.

5.4.7.1

Comparators for Interrupt Events

To save the idle current in Stand-by or Shutdown mode, the internal comparators that detects “Weak Battery” status, “VSYSOK or NG”

“ENCOMPARATOR” bit 6 to 0 in the 07h register. The comparators are enabled by default.

If the comparators are disabled in “no valid supply” on VBUS, the VBUSOK signal overrides the bit set to 1 by force, to detect weak battery

detection, VSYSOK or NG detection, and BATOVP detection. This wakes up the comparators to notify the application processor of these

interrupt events.

Die Temperature, SYS

current & Charge Current

INTB

Read

& clear

150°C

0mA

A pre-set

(mA)

130°C

0mA

Read

& clear

INT1: Thermal regulation of interrupt is asserted.

INT1

INT2