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TPA3144D2
www.ti.com
SLOS907B – APRIL 2015 – REVISED JULY 2015
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
MAX
UNIT
AVCC to GND, PVCC to GND
–0.3
16
V
Supply voltage
GVDD to GND
V
GND to GND
-0.3
0.3
V
Input current
To any pin except supply pins
10
mA
–0.3
AVCC + 0.3
V
Voltage
SD, FAULT, 1SPW to GND(2)
10
V/ms
–0.3
GVDD + 0.3
V
Voltage
GAIN, LIMRATE, LIMTHRES, SSCTRL(3)
100
V/ms
Voltage
RINN, RINP, LINN, LINP
–0.3
6.3
V
BTL, PVCC > 12 V
4.8
BTL, PVCC
≤ 12 V
3.2
Minimum load resistance, RL
Ω
PBTL, PVCC > 12 V
2.5
PBTL, PVCC
≤ 12 V
1.8
Continuous total power dissipation
See the Thermal Information Table
Operating free-air temperature range, TA
(4)
–40
85
°C
Temperature range
–65
150
°C
Storage temperature range, Tstg
–65
150
°C
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The voltage slew rate of these pins must be restricted to no more than 10 V/ms. For higher slew rates, use a 100 k
Ω resister in series
with the pins.
(3)
The voltage slew rate of these pins must be restricted to no more than 100 V/ms. For higher slew rates, use a 100 k
Ω resister in series
with the pins.
(4)
The TPA3144D2 incorporates an exposed thermal pad on the underside of the chip. This acts as a heatsink, and it must be connected
to a thermally dissipating plane for proper power dissipation. Failure to do so may result in the device going into thermal protection
shutdown. See TI Technical Briefs SLMA002 for more information about using the TSSOP thermal pad.
7.2 ESD Ratings
VALUE
UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±1000
V(ESD) Electrostatic discharge
V
Charged device model (CDM), per JEDEC specification JESD22-C101 (2)
±250
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
Copyright © 2015, Texas Instruments Incorporated
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