AS3510 datasheet(10/20 Pages) AMSCO

10 / 20 page

Product Brief AS3510

Rev. 1v2, June 2004

CONFIDENTIAL

Page 9 of 19

Microphone Path

Block Description

This block converts a differential microphone signal into

digital and does a synchronisation to the DAC I2S input

clocks. The SigmaDelta converter clock gets derived from

MCLK. For LRCK=32kHz

MCLK=4.096MHz, the

SD_CLK is 1.024MHz which gives with decimation to 14 bit

a sampling rate of 8kHz. Since the I2S signals for the DAC-

path is 4 times higher, each ADC-output-code will be

presented 4 times in both channels (left, right) the same.

For

LRCK=48kHz

MCLK=6.144MHz,

the

ADC

conversion rate will be 12kHz. Due to this synchronisation

the transfer of the ADC data is possible with just one extra

digital output pin which makes the digital interface very

efficient.

The microphone amplifier can be programmed to three

different gain values 28dB/ 34dB/ 40dB to adjust the circuit

to the used microphone. The microphone amplifier includes

a softclip function that reduces the gain when the input

voltage range of the ADC is violated.

The fullscale ADC input range is 1.157Vp differential with

AVDD=2.9V.

The softclip references are +/-0.434V which gives a

useable ADC-range of 0.868Vp differential. This gives a

nominal mic input voltage range of 34.72 / 17.36 / 8.68mVp

or 24 /12 / 6mVrms for the three micamp gain settings.

SoftClip is done with 15 steps of –1dB.

AS3510 bảng dữ liệu(PDF) 10 Page - ams AG