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ATMEGA16 bảng dữ liệu(PDF) 156 Page - ATMEL Corporation |
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ATMEGA16 bảng dữ liệu(HTML) 156 Page - ATMEL Corporation |
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156 / 315 page ![]() 156 ATmega16(L) 2466E–AVR–10/02 Read Access Doing a read access to the UBRRH or the UCSRC Register is a more complex opera- tion. However, in most applications, it is rarely necessary to read any of these registers. The read access is controlled by a timed sequence. Reading the I/O location once returns the UBRRH Register contents. If the register location was read in previous sys- tem clock cycle, reading the register in the current clock cycle will return the UCSRC contents. Note that the timed sequence for reading the UCSRC is an atomic operation. Interrupts must therefore be controlled (for example by disabling interrupts globally) dur- ing the read operation. The following code example shows how to read the UCSRC Register contents. Note: 1. The example code assumes that the part specific header file is included. The assembly code example returns the UCSRC value in r16. Reading the UBRRH contents is not an atomic operation and therefore it can be read as an ordinary register, as long as the previous instruction did not access the register location. USART Register Description USART I/O Data Register – UDR The USART Transmit Data Buffer Register and USART Receive Data Buffer Registers share the same I/O address referred to as USART Data Register or UDR. The Transmit Data Buffer Register (TXB) will be the destination for data written to the UDR register location. Reading the UDR Register location will return the contents of the receive data buffer register (RXB). For 5-, 6-, or 7-bit characters the upper unused bits will be ignored by the Transmitter and set to zero by the Receiver. Assembly Code Example(1) USART_ReadUCSRC: ; Read UCSRC in r16,UBRRH in r16,UCSRC ret C Code Example(1) unsigned char USART_ReadUCSRC( void ) { unsigned char ucsrc; /* Read UCSRC */ ucsrc = UBRRH; ucsrc = UCSRC; return ucsrc; } Bit 7 6 5432 10 RXB[7:0] UDR (Read) TXB[7:0] UDR (Write) Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0 0 0000 00 |
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