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SPG-FE-LX-CDFC bảng dữ liệu(PDF) 5 Page - Source Photonics, Inc.

tên linh kiện SPG-FE-LX-CDFC
Giải thích chi tiết về linh kiện  Built-in PHY supporting SGMII Interface
PDF  10 Pages
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nhà sản xuất  SOURCE [Source Photonics, Inc.]
Trang chủ  http://www.sourcephotonics.com
Logo SOURCE - Source Photonics, Inc.

SPG-FE-LX-CDFC bảng dữ liệu(HTML) 5 Page - Source Photonics, Inc.

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DS-7362 Rev 02 2013-11-21
SPG-FE-LX-IDFC
SPG-FE-LX-CDFC
6
MOD-DEF0
Module Definition 0
3
Note 3
7
Rate Select
Not Use
3
8
LOS
Loss of Signal
3
Note 4
9
VeeR
Receiver Ground
1
10
VeeR
Receiver Ground
1
11
VeeR
Receiver Ground
1
12
RD-
Inv. Received Data Out
3
Note 5
13
RD+
Received Data Out
3
Note 5
14
VeeR
Receiver Ground
1
15
VccR
Receiver Power
2
16
VccT
Transmitter Power
2
17
VeeT
Transmitter Ground
1
18
TD+
Transmit Data In
3
Note 6
19
TD-
Inv. Transmit Data In
3
Note 6
20
VeeT
Transmitter Ground
1
Notes:
1. TX Fault is an open collector output, which should be pulled up with a 4.7k~10k
Ω resistor on the host
board to a voltage between 2.0V and Vcc+0.3V. Logic 0 indicates normal operation; logic 1 indicates a
laser fault of some kind. In the low state, the output will be pulled to less than 0.8V.
2. TX Disable is an input that is used to shut down the transmitter optical output. It is pulled up within the
module with a 4.7k~10k
Ω resistor. Its states are:
Low (0~0.8V):
Transmitter on
(>0.8V, <2.0V):
Undefined
High (2.0~3.465V):
Transmitter Disabled
Open:
Transmitter Disabled
3. MOD-DEF 0, 1, 2 are the module definition pins. They should be pulled up with a 4.7k~10k
Ω resistor on
the host board. The pull-up voltage shall be VccT or VccR.
MOD-DEF 0 is grounded by the module to indicate that the module is present
MOD-DEF 1 is the clock line of two wire serial interface for serial ID
MOD-DEF 2 is the data line of two wire serial interface for serial ID
4. LOS is an open collector output, which should be pulled up with a 4.7k~10k
Ω resistor on the host board
to a voltage between 2.0V and Vcc+0.3V. Logic 0 indicates normal operation; logic 1 indicates loss of
signa or link down with partner l. In the low state, the output will be pulled to less than 0.8V.
5. These are the differential receiver output. They are internally AC-coupled 100Ω differential lines which
should be terminated with 100Ω (differential) at host with SGMII interface.
6. These are the differential transmitter inputs. They are AC-coupled, differential lines with 100Ω
differential termination inside the module.



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