TMP007 datasheet(22/55 Pages) TI

22 / 55 page

Frame 1 SMBus ALERT Response Address Byte

Frame 2 Slave Address From Device

Start By

Master

ACK By

Device

From

Device

NACK By

Master

Stop By

Master

SDA

SCL

ALERT

R/W

Status

(1)

Frame 3 Two-Wire Slave Address Byte

Frame 4 Data Byte 1 Read Register

Start By

Master

ACK By

Device

ACK By

Master

(2)

From

Device

SDA

(Continued)

SCL

(Continued)

SDA

(Continued)

SCL

(Continued)

(1)

R/W

D15

D14

D13

D12 D11

D10

Frame 5 Data Byte 2 Read Register

Stop By

Master

ACK By

Master

(3)

From

Device

(1)

Frame 1 Two-Wire Slave Address Byte

Frame 2 Pointer Register Byte

Start By

Master

ACK By

Device

ACK By

Device

SDA

SCL

(1)

R/W

(1)

TMP007

SBOS685C – APRIL 2014 – REVISED JULY 2015

www.ti.com

(1)

The value of A0, A1, and A2 are determined by the connections of the corresponding pins.

(2)

Master should leave SDA high to terminate a single-byte read operation.

(3)

Master should leave SDA high to terminate a two-byte read operation.

Figure 25. Two-Wire Timing Diagram for Read Word Format

(1)

The value of A0, A1, and A2 are determined by the connections of the corresponding pins.

Figure 26. Timing Diagram for SMBus Alert

Submit Documentation Feedback

Product Folder Links: TMP007

TMP007 bảng dữ liệu(PDF) 22 Page - Texas Instruments

TMP007 bảng dữ liệu(HTML) 22 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55

bảng dữ liệu tải về

Link URL