LP62S161024 datasheet(3/16 Pages) AMICC

tên linh kiện	LP62S161024

Giải thích chi tiết về linh kiện	16M BIT (1M x 16 / 2M x 8) LOW VOLTAGE CMOS SRAM

PDF	16 Pages

Scroll/Zoom	100%

nhà sản xuất	AMICC [AMIC Technology]

Trang chủ	http://www.amictechnology.com

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LP62S161024 Series

PRELIMINARY

(November, 2014, Version 0.0)

AMIC Technology, Corp.

Pin Configurations

TSOP (I)

LP62S161024V

A14

A13

A12

A11

A10

CS2

A18

I/O2

I/O10

I/O3

I/O11

VCC

I/O4

I/O12

I/O5

I/O13

I/O6

I/O14

I/O7

I/O15/A20

GND

BYTE

A16

A15

A19

I/O9

I/O1

I/O8

I/O0

GND

CS1

A17

CSP (Chip Size Package)

48-pin Top View

I/O8

I/O9

GND

VCC

I/O14

I/O15

A18

A19

A12

A10

A11

A13

A14

A15

I/O7

I/O6

I/O2

I/O0

GND

VCC

CS2

I/O13

I/O12

I/O11

I/O10

A17

A16

I/O1

I/O3

I/O4

I/O5

CS1

Note:

The BYTE pin in the 48-pin TSOP (I) package must be tied HIGH to use the device as a 1M x 16 SRAM. The 48-pin TSOP (I)

package can also be used as a 2M x 8 SRAM by tied the BYTE signal LOW. In the 2M x 8 configuration, pin 45 is A20, while

HB , LB and I/O8 to I/O14 pins are not used (NC).

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