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KAI-2001 bảng dữ liệu(PDF) 10 Page - ON Semiconductor |
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KAI-2001 bảng dữ liệu(HTML) 10 Page - ON Semiconductor |
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10 / 36 page ![]() KAI−2001 www.onsemi.com 10 IMAGING PERFORMANCE Table 5. TYPICAL OPERATIONAL CONDITIONS (Unless otherwise noted, the Imaging Performance Specifications are measured using the following conditions.) Description Condition Notes Frame Time 237 ms 1 Horizontal Clock Frequency 10 MHz Light Source Continuous Red, Green and Blue LED Illumination Centered at 450, 530 and 650 nm 2, 3 Operation Nominal Operating Voltages and Timing 1. Electronic shutter is not used. Integration time equals frame time. 2. LEDs used: Blue: Nichia NLPB500, Green: Nichia NSPG500S and Red: HP HLMP−8115. 3. For monochrome sensor, only green LED used. Specifications Table 6. PERFORMANCE SPECIFICATIONS Description Symbol Min. Nom. Max. Unit Sampling Plan Temperature Tested at ( 5C) ALL CONFIGURATIONS Dark Center Uniformity N/A N/A 20 e− rms Die 27, 40 Dark Global Uniformity N/A N/A 5.0 mVpp Die 27, 40 Global Uniformity (Note 1) N/A 2.5 5.0 % rms Die 27, 40 Global Peak to Peak Uniformity (Note 1) PRNU N/A 10 20 % pp Die 27, 40 Center Uniformity (Note 1) N/A 1.0 2.0 % rms Die 27, 40 Maximum Photoresponse Non-Linearity (Notes 2, 3) NL N/A 2 − % Design Maximum Gain Difference between Outputs (Notes 2, 3) DG N/A 10 − % Design Max. Signal Error due to Non-Linearity Dif. (Notes 2, 3) DNL N/A 1 − % Design Horizontal CCD Charge Capacity HNe N/A 100 N/A ke− Design Vertical CCD Charge Capacity VNe N/A 50 N/A ke− Die Photodiode Charge Capacity PNe 38 40 N/A ke− Die Horizontal CCD Charge Transfer Efficiency HCTE 0.99999 N/A N/A Design Vertical CCD Charge Transfer Efficiency VCTE 0.99999 N/A N/A Design Photodiode Dark Current IPD N/A N/A 40 0.01 350 0.1 e/p/s nA/cm2 Die 27, 40 Vertical CCD Dark Current IVD N/A N/A 400 0.12 1,711 0.5 e/p/s nA/cm2 Die 27, 40 Image Lag Lag N/A < 10 50 e− Design Anti-Blooming Factor XAB 100 300 N/A Design Vertical Smear Smr N/A 80 75 dB Design Total Noise (Note 4) ne−T − 23 − e− rms Design Total Noise (Note 5) ne−T − 40 − e− rms Design Dynamic Range (Notes 5, 6) DR − 60 − dB Design Output Amplifier DC Offset VODC 4 8.5 14 V Die |
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