MT9V024 datasheet(29/62 Pages) ONSEMI

29 / 62 page

MT9V024_DSRev. G Pub. 4/15 EN

©Semiconductor Components Industries, LLC, 2015.

MT9V024: 1/3-Inch Wide-VGA Digital Image Sensor

Feature Description

Pixel Integration Control

Total Integration

Total integration time is the result of coarse shutter width and fine shutter width regis-

ters, and depends also on whether manual or automatic exposure is selected.

The actual total integration time, tINT is defined as:

tINT = tINTCoarse + tINTFint

(EQ 2)

= (number of rows of integration x row time) +

(number of pixels of integration x pixel time)

where:

– Number of Rows of Integration

(Auto Exposure Control: Enabled)

When automatic exposure control (AEC) is enabled, the number of rows of integra-

tion may vary from frame to frame, with the limits controlled by R0xAC (minimum

coarse shutter width) and R0xAD (maximum coarse shutter width).

– Number of Rows of Integration

(Auto Exposure Control: Disabled)

If AEC is disabled, the number of rows of integration equals the value in R0x0B.

If context B is enabled, the number of rows of integration equals the value in

R0xD2.

– Number of Pixels of Integration

The number of fine shutter width pixels is independent of AEC mode (enabled or

disabled):

• Context A: the number of pixels of integration equals the value in R0xD5.

• Context B: the number of pixels of integration equals the value in R0xD8.

Row Timing

Context A: Row time = (R0x04 + R0x05) master clock periods

(EQ 3)

Context B: Row time = (R0xCC + R0xCD) master clock periods

(EQ 4)

Typically, the value of the Coarse Shutter Width Total registers is limited to the number

of rows per frame (which includes vertical blanking rows), such that the frame rate is not

affected by the integration time. If the Coarse Shutter Width Total is increased beyond

the total number of rows per frame, the user must add additional blanking rows using

the Vertical Blanking registers as needed. See descriptions of the Vertical Blanking regis-

ters, R0x06 and R0xCE in Table 1and Table 2 of the MT9V024 register reference.

A second constraint is that tINT must be adjusted to avoid banding in the image from

light flicker. Under 60Hz flicker, this means the frame time must be a multiple of 1/120 of

a second. Under 50Hz flicker, the frame time must be a multiple of 1/100 of a second.

MT9V024 bảng dữ liệu(PDF) 29 Page - ON Semiconductor

MT9V024 bảng dữ liệu(HTML) 29 Page - ON Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62

bảng dữ liệu tải về

Link URL