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AS260 bảng dữ liệu(PDF) 13 Page - ON Semiconductor |
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AS260 bảng dữ liệu(HTML) 13 Page - ON Semiconductor |
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13 / 45 page ![]() AR0260 DS Rev. G Pub. 4/15 EN 13 ©Semiconductor Components Industries, LLC,2015. AR0260: 1/6-Inch 1080P High-Definition (HD) Digital Image Sensor Power-Down Sequence The output states during hard reset are shown in Table 7. Soft Reset The host processor can reset the AR0260 using the two-wire serial interface by writing to SYSCTL 0x001A. SYSCTL 0x001A[0] is used to reset the AR0260 which is similar to external RESET_BAR signal. 1. Set SYSCTL 0x001A[0] to 0x1 to initiate internal reset cycle. 2. Reset SYSCTL 0x001A[0] to 0x0 for normal operation. 3. Delay up to 35 ms, depending on EXTCLK frequency. Figure 6: Soft Reset Operation Notes: 1. This delay is dependent on EXTCLK frequency. Table 7: Status of Output Signals During Hard Reset Signal Reset DOUT[7:0] High-Z PIXCLK High-Z LV High-Z FV High-Z DATA_N 0 DATA_P 0 DATA_2N 0 DATA_2P 0 CLK_N 0 CLK_P 0 Table 8: Soft Reset Signal Timing Symbol Parameter Min Typ Max Unit t1 Maximum soft reset time1 –– 35 ms EXTCLK SDATA Mode Write soft reset comand Internal boot time Enter standby mode t1 SCLK |
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