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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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ML6695 bảng dữ liệu(PDF) 3 Page - Micro Linear Corporation |
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ML6695 bảng dữ liệu(HTML) 3 Page - Micro Linear Corporation |
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3 / 8 page  ML6695 3 PIN NAME FUNCTION 9 RSM3 Receive data TTL outputs. RSM 0- 4 output may be sampled synchronously with RXC’s rising edge. 10 DGND1 Digital ground 11 RSM2 Receive data TTL outputs. RSM 0- 4 output may be sampled synchronously with RXC’s rising edge. 12 DVCC1 Digital positive power supply 13 RSM1 Receive data TTL outputs. RSM 0- 4 output may be sampled synchronously with RXC’s rising edge. 14 DGND2 Digital ground 15 RSM0 Receive data TTL outputs. RSM 0- 4 output may be sampled synchronously with RXC’s rising edge. 16 RXC Recovered receive symbol clock TTL output. This 25MHz clock is phase-aligned with the internal 125MHz bit clock recovered from the signal received at VIN+/–. Receive data are clocked out at RSM 0-4 on the falling edges of this clock. 17 DGND3 Digital ground 18 SDO Signal Detect TTL output. This output goes high when the signal at VIN+/- exceeds the preset amplitude threshold. 19 DVCC2 Digital positive power supply 20 DGND4C Digital ground 21 DGND4B Digital ground 22 DGND4 Digital ground 23 DVCC5 Digital positive power supply 24 DGND5B Digital ground 25 DGND5A Digital ground PIN NAME FUNCTION 26 CAPDC Data quantizer offset-correction loop, offset-storage capacitor input pin. The capacitor tied between this pin and AVCC stores the amplified data quantizer offset voltage and also sets the dominant pole in the offset-correction loop. A 0.1µF surface mount is recommended. 27 CAPB Data quantizer input bias bypass capacitor input. The capacitor tied between this pin and AVCC filters the quantizer’s internal input bias reference. A 0.1µF surface-mount capacitor is recommended. 28 AGND4B Analog ground 29 VIN– Receive quantizer input. This differential input pair receives 100BASE-FX NRZI signals from the network opto-coupler. 30 VIN+ Receive quantizer input. This differential input pair receives 100BASE-FX NRZI signals from the network opto-coupler. 31 AVCC4B Analog positive power supply 32 AGND4A Analog ground 33 AVCC4A Analog positive power supply 34 AVCC3B Analog positive power supply 35 AVCC3A Analog positive power supply 36 RTSET Transmit level bias resistor. For 100BASE-FX, an external 2.32k W, 1% resistor connected between RTSET and AGND3 sets a precision constant bias current that gives a nominal output "on" current of 75mA at IOUT. 37 AGND3 Analog ground 38 IOUT Transmit LED output. This pin connects through an external 15 W resistor to AVCC when the part is used to drive a network LED. PIN DESCRIPTION (Continued) |
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