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TC7135 bảng dữ liệu(PDF) 10 Page - Microchip Technology

tên linh kiện TC7135
Giải thích chi tiết về linh kiện  4-1/2 Digit A/D Converter
PDF  22 Pages
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TC7135 bảng dữ liệu(HTML) 10 Page - Microchip Technology

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TC7135
DS21460B-page 10
© 2002 Microchip Technology Inc.
FIGURE 5-2:
TIMING DIAGRAMS FOR
OUTPUTS
5.1
RUN/HOLD Input
When left open, this pin assumes a logic "1" level. With
a RUN/HOLD = 1, the TC7135 performs conversions
continuously, with a new measurement cycle beginning
every 40,002 clock pulses.
When RUN/HOLD changes to a logic "0," the measure-
ment cycle in progress will be completed, data held and
displayed, as long as the logic "0" condition exists.
A positive pulse (>300nsec) at RUN/HOLD initiates a
new measurement cycle. The measurement cycle in
progress when RUN/HOLD initially assumed the logic
"0" state must be completed before the positive pulse
can be recognized as a single conversion run
command.
The new measurement cycle begins with a 10,001-
count auto zero phase. At the end of this phase the
busy signal goes high.
5.2
STROBE Output
During the measurement cycle, the STROBE control
line is pulsed low five times. The five low pulses occur
in the center of the digit drive signals (D1,D2,D3,D5)
(see Figure 5-3).
D5 (MSD) goes high for 201 counts when the measure-
ment cycles end. In the center of the D5 pulse, 101
clock pulses after the end of the measurement cycle,
the first STROBE occurs for one half clock pulse. After
the D5 digit strobe, D4 goes high for 200 clock pulses.
The STROBE then goes low 100 clock pulses after D4
goes high. This continues through the D1 digit drive
pulse.
The digit drive signals will continue to permit display
scanning. STROBE pulses are not repeated until a new
measurement is completed. The digit drive signals will
not continue if the previous signal resulted in an
overrange condition.
Theactivelow STROBE pulses aid BCD data transfer
to UARTs, processors and external latches. For more
information, please refer to Application Note 784.
FIGURE 5-3:
STROBE SIGNAL LOW
FIVE TIMES PER
CONVERSION
Integrator
Output
Overrange when
Applicable
Underrange when
Applicable
System
Zero
10,001
Counts
Signal
Integrate
10,000
Counts
(Fixed)
Reference
Integrate
20,001
Counts (Max)
Full Measurement Cycle
40,002 Counts
Busy
Expanded Scale Below
D5
D4
D3
D2
D1
100
Counts
Digit Scan
STROBE
Auto Zero
Signal
Integrate
Reference
Integrate
D5
D4
D3
D2
D1
Digit Scan
for Overrange
First D5 of System Zero and
Reference Integrate One Count
Longer
*
*
*
End of Conversion
D5 (MSD)
Data
Busy
B1–B8
STROBE
D5
D4
D3
D2
D1
D4
Data
D3
Data
D2
Data
D1 (LSD)
Data
D5
Data
Note Absence of
STROBE
201
Counts
200
Counts
200
Counts
200
Counts
200
Counts
200
Counts
200
Counts
*
*Delay between Busy going Low and First STROBE pulse is
dependent on Analog Input.
TC835
Outputs



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