CF745 datasheet(22/217 Pages) MICROCHIP

22 / 217 page

PIC16C5X

DS30453B-page 22

Preliminary

4.5

Program Counter

As a program instruction is executed, the Program

Counter (PC) will contain the address of the next

program instruction to be executed. The PC value is

increased by one every instruction cycle, unless an

instruction changes the PC.

For a GOTO instruction, bits 8:0 of the PC are provided

by the GOTO instruction word. The PC Latch (PCL) is

mapped to PC<7:0> (Figure 4-10 and Figure 4-11).

For the PIC16C56s, PIC16CR56s, PIC16C57s,

PIC16CR57s, PIC16C58s and PIC16CR58s, a page

number must be supplied as well. Bit5 and bit6 of the

STATUS register provide page information to bit9 and

bit10 of the PC (Figure 4-11 and Figure 4-12).

For a CALL instruction, or any instruction where the

PCL is the destination, bits 7:0 of the PC again are

provided by the instruction word. However, PC<8>

does not come from the instruction word, but is always

cleared (Figure 4-10 and Figure 4-11).

Instructions where the PCL is the destination, or

Modify PCL instructions, include MOVWF PC, ADDWF

PC,

and BSF PC,5.

For the PIC16C56s, PIC16CR56s, PIC16C57s,

PIC16CR57s, PIC16C58s and PIC16CR58s, a page

number again must be supplied. Bit5 and bit6 of the

STATUS register provide page information to bit9 and

bit10 of the PC (Figure 4-11 and Figure 4-12).

Note:

Because PC<8> is cleared in the CALL

instruction, or any Modify PCL instruction,

all subroutine calls or computed jumps are

limited to the ﬁrst 256 locations of any pro-

gram memory page (512 words long).

FIGURE 4-10: LOADING OF PC

BRANCH INSTRUCTIONS -

PIC16C52, PIC16C54s,

PIC16CR54s, PIC16C55s

FIGURE 4-11: LOADING OF PC

BRANCH INSTRUCTIONS -

PIC16C56s/PIC16CR56s

PCL

Reset to '0'

Instruction Word

GOTO

Instruction

CALL

or Modify PCL Instruction

PA1:PA0

STATUS

PCL

PA1:PA0

STATUS

PCL

Instruction Word

Reset to ‘0’

Instruction Word

GOTO

Instruction

CALL

or Modify PCL Instruction

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