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CF745 bảng dữ liệu(PDF) 89 Page - Microchip Technology |
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CF745 bảng dữ liệu(HTML) 89 Page - Microchip Technology |
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89 / 217 page ![]() © 1998 Microchip Technology Inc. Preliminary DS30453B-page 89 PIC16CR54A PIC16C5X 13.0 ELECTRICAL CHARACTERISTICS - PIC16CR54A Absolute Maximum Ratings† Ambient Temperature under bias ........................................................................................................... –55 °C to +125°C Storage Temperature.............................................................................................................................. –65 °C to +150°C Voltage on VDD with respect to VSS ..................................................................................................................0 to +7.5V Voltage on MCLR with respect to VSS(2) ............................................................................................................0 to +14V Voltage on all other pins with respect to VSS ................................................................................. –0.6V to (VDD + 0.6V) Total Power Dissipation(1) ....................................................................................................................................800 mW Max. Current out of VSS pin...................................................................................................................................150 mA Max. Current into VDD pin........................................................................................................................................50 mA Max. Current into an input pin (T0CKI only) .....................................................................................................................±500 µA Input Clamp Current, IIK (VI < 0 or VI > VDD) ....................................................................................................................±20 mA Output Clamp Current, IOK (V0 < 0 or V0 > VDD) .............................................................................................................±20 mA Max. Output Current sunk by any I/O pin ................................................................................................................25 mA Max. Output Current sourced by any I/O pin ...........................................................................................................20 mA Max. Output Current sourced by a single I/O port (PORTA or B)............................................................................40 mA Max. Output Current sunk by a single I/O port (PORTA or B) .................................................................................50 mA Note 1: Power Dissipation is calculated as follows: PDIS = VDD x {IDD - ∑ IOH} + ∑ {(VDD-VOH) x IOH} + ∑(VOL x IOL) Note 2: Voltage spikes below Vss at the MCLR pin, inducing currents greater than 80 mA may cause latch-up. Thus, a series resistor of 50 to 100 Ω should be used when applying a low level to the MCLR pin rather than pulling this pin directly to Vss. †NOTICE: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. |
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