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MCP2120 bảng dữ liệu(PDF) 25 Page - Microchip Technology |
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MCP2120 bảng dữ liệu(HTML) 25 Page - Microchip Technology |
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25 / 64 page ![]() 2001 Microchip Technology Inc. DS51246A-page 21 MCP2120/MCP2150 USER’S GUIDE 12 Chapter 3. MCP2120 Tutorial 3.1 Introduction This chapter covers a tutorial for using the MCP2120 Developer’s Board. 3.2 Highlights Topics covered in this chapter • MCP2120 Tutorial Setup • Hardware Setup • Setting Up the Terminal Program • Transmitting/Receiving Data 3.3 MCP2120 Tutorial Setup This tutorial will use both MCP2120 Developer’s Boards. The system will operate at 9600 Baud. Each board will be connected via the UART to the serial port of a personal computer (PC). This means that either two PCs are required, or a PC with two serial ports, as shown in Figure 3.1. It is assumed that two PCs will be used, and that each PC will have the Terminal Emulation program configured identically. Figure 3.1: System Block Diagram PC PC J5 D4 C15 C12 C13 C14 C9 C5 C1 J2 MCP2120 Developer’s Board 02-01608 Rev. 1 U1 J1 J4 R14 CR1 C4 C7 C8 R1 Q1 JP5 U3 R2 C2 C3 J3 +5VGND R13 C16 JP3:JP1 000=Fosc/768 001=Fosc/384 010=Fosc/192 011=Fosc/128 100=Fosc/64 111=S/W Baud Open=0 Integrated Transceiver U6 R8 R7 R6 R4 JP4 (MCP2120) Open=Enabled R9 D3 D6D2 U2 C6 R3 C10 U4 R5 R11 R10 Component Transceiver J7 J6 R12 D1 D5 C18 R15 C11 MCP2120 Developer’s Board 1 J5 D4 C15 C12 C13 C14 C9 C5 C1 J2 MCP2120 Developer’s Board 02-01608 Rev. 1 U1 J1 J4 R14 CR1 C4 C7 C8 R1 Q1 JP5 U3 R2 C2 C3 J3 +5V GND R13 C16 JP3:JP1 000=Fosc/768 001=Fosc/384 010=Fosc/192 011=Fosc/128 100=Fosc/64 111=S/W Baud Open=0 Integrated Transceiver U6 R8 R7 R6 R4 JP4 (MCP2120) Open=Enabled R9 D3 D6 D2 U2 C6 R3 C10 U4 R5 R11 R10 Component Transceiver J7 J6 R12 D1 D5 C18 R15 C11 MCP2120 Developer’s Board 2 |
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