HIGH RIPPLE-REJECTION AND LOW DROPOUT CMOS VOLTAGE REGULATOR

S-L2980 Series

Seiko Instruments Inc.

13

Precautions

• Wiring patterns for VIN pin, VOUT pin and GND pin should be designed to hold low impedance. When

as possible.

• Note that output voltage may increase when a series regulator is used at low load current (1.0 mA or less).

• Generally a series regulator may cause oscillation, depending on the selection of external parts. The

following conditions are recommended for this IC. However, be sure to perform sufficient evaluation under

the actual usage conditions for selection, including evaluation of temperature characteristics.

0.47

μF or more

1.0

Equivalent Series Resistance (ESR): 10

Ω or less

10

Ω or less

*1. If the product whose output voltage will be is 1.7 V or less is used, the capacitance should be 2.2

μF

or more.

• A voltage regulator may oscillate when the impedance of the power supply is high and the input capacitor

is small or not connected.

• Overshoot may occur in the output voltage momentarily if the voltage is rapidly raised at power-on or

when the power supply fluctuates. Sufficiently evaluate the output voltage at power-on with the actual

device.

• The application condition for input voltage, output voltage and load current should not exceed the package

power dissipation.

• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in

electrostatic protection circuit.

• In determining output current attention should be paid to the output current value specified in the Table 4

for “ Electrical Characteristics” and the footnote *5.

• SII claims no responsibility for any and all disputes arising out of or in connection with any infringement of

the products including this IC upon patents owned by a third party.