SL2980 datasheet(11/23 Pages) SII

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Giải thích chi tiết về linh kiện	HIGH RIPPLE-REJECTION AND LOW DROPOUT

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HIGH RIPPLE-REJECTION AND LOW DROPOUT CMOS VOLTAGE REGULATOR

Rev.5.1_00

S-L2980 Series

Seiko Instruments Inc.

Operation

1. Basic Operation

Figure 11 shows the block diagram of the S-L2980 Series.

The error amplifier compares the reference voltage (Vref) with feedback voltage (Vfb), which is the output

voltage resistance-divided by feedback resistors (Rs and Rf). It supplies the gate voltage necessary to

maintain the constant output voltage which is not influenced by the input voltage and temperature

change, to the output transistor.

*1. Parasitic diode

VSS

Current

supply

−

Vfb

Vref

VIN

VOUT

Error

amplifier

Reference

voltage

circuit

Figure 11

2. Output Transistor

In the S-L2980 Series, a low on-resistance P-channel MOS FET is used as the output transistor.

Be sure that VOUT does not exceed VIN + 0.3 V to prevent the voltage regulator from being damaged due

to inverse current flowing from the VOUT pin through a parasitic diode to the VIN pin.

SL2980 bảng dữ liệu(PDF) 11 Page - Seiko Instruments Inc