STC5455 datasheet(42/56 Pages) CONNOR-WINFIELD

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TM121

Rev:P1.3

Date: October 24, 2011

STC5455

Synchronous Clock for SETS

Data sheet

Preliminary

Synth_Index_Select, 0x4A (R/W)

Determines which synthesizer is selected for setting frequency value at the register Synth_Freq_Value and

adjusting phase skew at the register Synth_Skew_Adj.

Default value: 0

Synth_Freq_Value, 0x4B (R/W)

Selects synthesizer frequency value from 1MHz to 156.25MHz, in 1kHz steps, based on which synthesizer

index is selected at register Synth_Index_Select.

This register is not writable for synthesizer F and synthesizer GT4 since their frequency are fixed. Frequency of

synthesizer F is fixed at 8kHz and 2kHz. Frequency of synthesizer GT4 is fixed at 2.048MHz.

Default value varies with synthesizer index selection at the register Synth_Index_Select, refer to table below:

Written values less than 1000 or greater than 156250 are invalid.

Synth_Skew_Adj, 0x4E (R/W)

Address

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

0x4A

Not Used

Synthesizer index selection for synthesizer frequency and

phase skew adjustment

Field Value

Synthesizer

Associated CLK Output

Synthesizer F

CLK8K, CLK2K, CLK2

Synthesizer G1

CLK1

Synthesizer G2

CLK2

Address

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

0x4B

Bits 0-7 of 18 bits Synthesizer Frequency Selection

0x4C

Bits 15-8 of 18 bits Synthesizer Frequency Selection

0x4D

Not used

Bits 17-16 of 18 bits Synthesizer

Frequency Selection

Synthesizer Index Selection

Associated CLK Output

Default Value

Synthesizer G1

CLK1

155520 (155.52MHz)

Synthesizer G2

CLK2

38880 (38.88MHz)

Address

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

0x4E

Lower 8 bits of Synthesizer Phase Skew Adjustment

0x4F

Not used

Higher 4 bits of Synthesizer Phase Skew Adjustment

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