P4C1281-35JM datasheet(1/11 Pages) PYRAMID

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Document # SRAM136 REV OR

Revised July 2009

P4C1281/P4C1282

ULTRA HIGH SPEED 64K X 4

cmoS STATIc RAmS

FEATURES

Full CMOS, 6T Cell

High Speed (Equal Access and Cycle Times)

– 12/15/20/25 ns (Commercial)

– 15/20/25/35 ns (Industrial)

– 20/25/35/45 ns (Military)

Low Power Operation

5V ± 10% Power Supply

Separate Inputs and Outputs

– P4C1281 Input Data at Outputs during Write

– P4C1282 Outputs in High Z during Write

Fully TTL Compatible Inputs and Outputs

Standard Pinout (JEDEC Approved)

– 28-Pin 300 mil DIP, SOJ

– 28-Pin 350 x 550 mil LCC

FUnCTIOnAL BLOCk DIAgRAM

PIn COnFIgURATIOnS

DIP (P5, C5, D5-2), SOJ (J5)

DESCRIPTIOn

The P4C1281 and P4C1282 are 262,144-bit (64Kx4) ultra

high-speed static RAMs similar to the P4C1258, but with

separate data I/O pins. The P4C1281 features a transpar-

ent write operation; the outputs of the P4C1282 are in high

impedance during the write cycle. The RAMs operate from

a single 5V ± 10% tolerance power supply.

Access times as fast as 12 nanoseconds are available,

permitting greatly enhanced system operating speeds.

CMOS is used to reduce power consumption.

The P4C1281 and P4C1282 are available in 28-pin 300

mil DIP and SOJ, and a 28-pin 350x550 mil LCC providing

excellent board level densities.

LCC (L5)

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List of Unclassifed Man...	P4C1256	89Kb / 8P	HIGH SPEED 32K x 8 STATIC CMOS RAM
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Pyramid Semiconductor C...	P4C1256-12CILF	170Kb / 17P	HIGH SPEED 32K x 8 STATIC CMOS RAM

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