Usage precaution

Mitsubishi microcomputers

M16C / 62M Group

(Low voltage version)

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

25

(4) External interrupt

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• When the polarity of the INT0 to INT5 pins is changed, the interrupt request bit is sometimes set

to "1". After changing the polarity, set the interrupt request bit to "0".

Example 1:

INT_SWITCH1:

FCLR

I

; Disable interrupts.

AND.B

#00h, 0055h

; Clear TA0IC int. priority level and int. request bit.

NOP

; Four NOP instructions are required when using HOLD function.

NOP

FSET

I

; Enable interrupts.

Example 2:

INT_SWITCH2:

FCLR

I

; Disable interrupts.

AND.B

#00h, 0055h

; Clear TA0IC int. priority level and int. request bit.

MOV.W MEM, R0

; Dummy read.

FSET

I

; Enable interrupts.

Example 3:

INT_SWITCH3:

PUSHC FLG

; Push Flag register onto stack

FCLR

I

; Disable interrupts.

AND.B

#00h, 0055h

; Clear TA0IC int. priority level and int. request bit.

POPC

FLG

; Enable interrupts.

The reason why two NOP instructions (four when using the HOLD function) or dummy read are inserted

before FSET I in Examples 1 and 2 is to prevent the interrupt enable flag I from being set before the

interrupt control register is rewritten due to effects of the instruction queue.

(5) Rewrite the interrupt control register

• To rewrite the interrupt control register, do so at a point that does not generate the interrupt

request for that register. If there is possibility of the interrupt request occur, rewrite the interrupt

control register after the interrupt is disabled. The program examples are described as follow:

• When a instruction to rewrite the interrupt control register is executed but the interrupt is disabled,

the interrupt request bit is not set sometimes even if the interrupt request for that register has

been generated. This will depend on the instruction. If this creates problems, use the below in-

structions to change the register.

Instructions : AND, OR, BCLR, BSET

Noise

• Insert bypass capacitor (about 0.1

lines.