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LTC1314CS bảng dữ liệu(PDF) 5 Page - Linear Technology

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LTC1314CS bảng dữ liệu(HTML) 5 Page - Linear Technology

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5
LTC1314/LTC1315
PIN FUNCTIONS
LTC1315
VPPIN (Pins 1, 7): 12V Power Inputs.
SHDN (Pins 2, 8): Shutdown Outputs. When the output is
high, the external 12V regulator can be shut down to
conserve power consumption.
EN0, EN1 (Pins 3, 4, 9, 10): Logic inputs that control the
voltage output on VPPOUT. The input thresholds are
compatible with TTL/CMOS levels. Refer to the Truth
Table.
VCC0 (Pins 5, 11): Logic inputs that control the state of the
MOSFET gate driver DRV3. ESD protection device limits
input excursions to 0.6V below ground.
VCC1 (Pins 6, 12): Logic inputs that control the state of the
MOSFET gate driver DRV5. ESD protection device limits
input excursions to 0.6V below ground.
DRV5, DRV3 (Pins 13, 14, 19, 20): Gate driver outputs
that control the external MOSFETs that switch the VCC pin
of card slot to Hi-Z, 3.3V, or 5V.
VDD (Pins 15, 21): Positive Supplies, 4.5V ≤ VDD ≤ 5.5V.
These pins supply the power to the control logic and the
charge pumps and must be continuously powered.
GND (Pins 16, 22): Ground Connections.
VPPOUT (Pins 17, 23): Switched outputs that provide 0V,
3.3V, 5V, 12V, or Hi-Z to the VPP pin of the card slot. Refer
to the Truth Table.
VCCIN (Pins 18, 24): 5V or 3.3V Power Inputs.
GATE CHARGE
AND DISCHARGE
CONTROL LOGIC
OSCILLATOR
AND BIAS
CHARGE
PUMP
CHARGE
PUMP
BREAK-BEFORE-
MAKE SWITCHES
TTL TO CMOS
CONVERTER
TTL TO CMOS
CONVERTER
GATE CHARGE
AND DISCHARGE
CONTROL LOGIC
GATE CHARGE
CONTROL LOGIC
OSCILLATOR AND
CHARGE PUMP
OUTPUT
SWITCHES
TTL TO CMOS
CONVERTER
TTL TO CMOS
CONVERTER
–
+
SHDN
VPPIN
VPPIN
VCC0
VCC1
10V
EN1
EN0
VCCIN
VPPOUT
GND
DRV3
DRV5
LTC1314 • BD
GATE CHARGE
AND DISCHARGE
CONTROL LOGIC
BLOCK DIAGRAM
LTC1314 or 1/2 LTC1315



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