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LTC1235CS bảng dữ liệu(PDF) 12 Page - Linear Technology |
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LTC1235CS bảng dữ liệu(HTML) 12 Page - Linear Technology |
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12 / 16 page  12 LTC1235 Choose R3 = 300k Ω and R1 = 51kΩ. Also select R4 = 10k Ω which is much smaller than R3. R2 = 9.7k Ω, Choose nearest 5% resistor 10k and recalcu- late VL, VHYSTERESIS = 8.151V – 7.32V = 831mV S APPLICATI I FOR ATIO Power Fail Warning The LTC1235 generates a Power Failure Output (PFO) for early warning of failure in the microprocessor's power supply. This is accomplished by comparing the Power Failure Input (PFI) with an internal 1.3V reference. PFO goes low when the voltage at PFI pin is less than 1.3V. Typically PFI is driven by an external voltage divider (R1 and R2 in Figures 8 and 9) which senses either an unregulated DC input or a regulated 5V output. The voltage divider ratio can be chosen such that the voltage at PFI pin falls below 1.3V several milliseconds before the +5V supply falls below the maximum reset voltage threshold 4.75V. PFO is normally used to interrupt the microproces- sor to execute shut-down procedure between PFO and RESET or RESET. The power fail comparator, C3, does not have hysteresis. Hysteresis can be added however, by connecting a resis- tor between the PFO output and the noninverting PFI input pin as shown in Figures 8 and 9. The upper and lower trip points in the comparator are established as follows: When PFO output is low, R3 sinks current from the summing junction at the PFI pin. When PFO output is high, the series combination of R3 and R4 source current into the PFI summing junction. Example 1: The circuit in Figure 8 demonstrates the use of the power fail comparator to monitor the unregulated power supply input. Assuming the the rate of decay of the supply input VIN is 100mV/ms and the total time to execute a shut-down procedure is 8ms. Also the noise of VIN is 200mV. With these assumptions in mind, we can reason- ably set VL = 7.5V which 1.25V greater than the sum of maximum reset voltage threshold and the dropout voltage of LT1086-5 (4.75V + 1.5V) and VHYSTERESIS = 850mV. 10µF 100µF VIN VOUT ADJ LTC1235 F07 VCC 0.1µF TO µP GND PFO LT1086-5 VIN ≥ 7.5V R4 10k PFI LTC1235 R1 51k R2 10k R3 300k + + +5V BACKUP 10µF 10µF VIN VOUT ADJ LTC1235 F08 VCC 0.1µF TO µP PFO GND LT1086-5 VIN ≥ 6.5V R4 10k PFI + R1 27k R3 2.7M R2 8.2k + +5V R5 3.3k LTC1235 BACKUP Figure 9. Monitoring Regulated DC Supply with the LTC1235 Power Fail Comparator Figure 8. Monitoring Unregulated DC Supply with the LTC1235 Power Fail Comparator R3 ≈ 5.88 R1 V = 1.3V 1+ R1 R2 R1 R3 H + V 1.3V 1 R1 R2 – (5V – 1.3V)R1 1.3V(R3 R4) L =+ + Assuming R4«R3,V 5V R1 R3 HYSTERESIS = V5V R1 R3 850mV HYSTERESIS == 7.5V = 1.3V 1+ 51k R2 – (5V – 1.3V)51k 1.3V(310k ) ΩΩ Ω V 1.3V 1 51k 10k – (5V – 1.3V)51k 1.3V(310k 7.32V L =+ = Ω Ω Ω Ω) V 1.3V 1 51k 10k 51k 300k 8.151V H =+ + = Ω Ω Ω Ω (7.32V – 6.25V) 100mV/ms 10.7ms = |
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