AN4467 datasheet(28/33 Pages) STMICROELECTRONICS

28 / 33 page

Reference design

AN4467

28/33

DocID026156 Rev 2

Reference design

6.1

Description

The reference design shown in Figure 15, is based on the STM32L053RBT6

This reference design can be tailored to any Root part number 1 device with a different

package, using the pin correspondence given in Table 7: Reference connection for all

packages.

6.1.1

Clock

Two clock sources are used for the microcontroller:

•

LSE: X2– 32.768 kHz crystal for the embedded RTC

•

HSE: X1– 8 MHz crystal for the Root part number 1 microcontroller

Refer to Section 2: Clocks.

6.1.2

Reset

The reset signal in Figure 15 is active low. The reset sources include:

•

Reset button (B1)

•

Debugging tools via the connector CN1

Refer to Section 1.3: Reset and power supply supervisor.

6.1.3

Boot mode

The boot option is configured by setting switches SW1 (Boot 0). Refer to Section 3: Boot

configuration.

Note:

When waking up from Standby mode, the Boot pin is sampled. In this situation, you need to

pay attention to its value.

6.1.4

SWD interface

The reference design shows the connection between the Root part number 1 and a

standard SWD connector. Refer to Section 4: Debug management.

Note:

It is recommended to connect the reset pins so as to be able to reset the application from

the tools.

6.1.5

Power supply

Refer to Section 1: Power supplies.

AN4467 bảng dữ liệu(PDF) 28 Page - STMicroelectronics

AN4467 bảng dữ liệu(HTML) 28 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33

bảng dữ liệu tải về

Link URL