AN4467 datasheet(16/33 Pages) STMICROELECTRONICS

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Power supplies

AN4467

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DocID026156 Rev 2

sequence. The power-on and power-down is then monitored by the POR and PDR (see

power-on reset (POR)/power-down reset (PDR) section in the product datasheets).

The BOR threshold hysteresis is ~100 mV (between the rising and the falling edge of the

supply voltage).

1.3.4

System reset

A system reset sets all registers to their reset values except for the RTC, backup registers

and RCC control/status register, RCC_CSR.

A system reset is generated when one of the following events occurs:

A low level on the NRST pin (external reset)

Window watchdog end-of-count condition (WWDG reset)

Independent watchdog end-of-count condition (IWDG reset)

A reset bit set by software (SWreset)

Entering Standby or Stop mode configured to generate a reset (Low-power

management reset)

Option byte loader reset

Exiting Standby mode

Firewall reset.

The reset source can be identified by checking the reset flags in the Control/Status register,

RCC_CSR.

Figure 7. Simplified diagram of the reset circuit

The STM32L does not require an external reset circuit to power-up correctly. Only a pull-

down capacitor is recommended to improve EMS performance by protecting the device

against parasitic resets (see Figure 7).

Charging/discharging the pull-down capacitor through the internal resistor adds to the

device power consumption. The recommended value of 100 nF for the capacitor can be

reduced to 10 nF to limit power consumption.

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