DocID024966 Rev 1

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AN4325

Boot configuration

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Boot configuration

In the STM32F030, three different boot modes can be selected through the BOOT0 pin and

nBOOT1 option bit, as shown in Table 2.

The values of both BOOT0 pin and nBOOT1 bit are latched on the 4th rising edge of

SYSCLK after a reset. The user must set nBOOT1 and BOOT0 to select the required boot

mode.

The BOOT0 pin and nBOOT1 bit are also re-sampled when exiting from Standby mode.

Consequently they must be kept in the required Boot mode configuration in Standby mode.

After the startup delay has elapsed, the CPU fetches the top-of-stack value from address

0x0000 0000, then starts code execution from the boot memory at 0x0000 0004.

Depending on the selected boot mode, main Flash memory, system memory or SRAM is

accessible as follows:



Boot from main Flash memory: the main Flash memory is aliased in the boot memory

space (0x0000 0000), but is still accessible from its original memory space

(0x0800 0000). In other words, the Flash memory contents can be accessed starting

from address 0x0000 0000 or 0x0800 0000.



Boot from System memory: the system memory is aliased in the boot memory space



Boot from embedded SRAM: the SRAM is aliased in the boot memory space (0x0000

0000), but is still accessible from its original memory space (0x2000 0000).

Embedded boot loader

The embedded boot loader is located in the System memory, programmed by ST during

production. It is used to reprogram the Flash memory using one of the following serial

interfaces:



USART1 (PA9/PA10)



USART2 (PA14/PA15)

For additional information, refer to application note AN2606.

Table 2. Boot modes

Boot mode selection

Boot mode

Aliasing

1. The BOOT1 value is the opposite of the nBOOT1 option bit.

BOOT0

x

0

Main Flash memory

Main Flash memory is selected as boot space

0

1

System memory

System memory is selected as boot space

1

1

Embedded SRAM

Embedded SRAM is selected as boot space