DocID023897 Rev 1

21/24

Dual modes

1.

Configure the ADC master (channels to be converted, sampling times, etc.).

2.

Configure the ADC slave (channels to be converted, sampling times, etc.).

3.

Configure the ADC master external trigger to be used to trigger the injected conversion

for both master and slave.

4.

Select the dual mode by setting MULTI[4:0] to ‘01001’ to select the alternate trigger

mode.

5.

Select the ADC clock mode by setting the CKMODE[1:0] bits to the desired value.

The JEOS flags and interrupts for master and slave are used to read the converted data.

If enabled, a JEOS interrupt is generated after conversion of all injected channels of the

master ADC in the group. The converted data can then be read from the ADC_JDRx master

registers.

If enabled, a JEOS interrupt is generated after conversion of all injected channels of the

slave ADC in the group. The converted data can then be read from the ADC_JDRx slave

registers.

3.4.1

Application example

The dual alternate trigger mode makes it possible to have sampling points as close as

possible to each other (down to 1.5 ADC cycles). This is interesting for instance in motor

control applications, where a single-shunt sensor is used for three-phase current reading. In

some cases, the PWM duty cycle of the power stage has to be limited to maintain a

minimum time slot for two consecutive conversions. If the sampling points are as close as

possible, the PWM duty cycle is maximized, which increases the voltage applied to the

motor.