AN4080 datasheet(11/35 Pages) STMICROELECTRONICS

11 / 35 page

DocID023035 Rev 4

11/35

AN4080

Power supplies and reset sources of the STM32F0xx family

1.2

Reset and power supply supervisor

1.2.1

Power-on reset (POR) / power-down reset (PDR) of the STM32F0x1/x2

devices

The device has an integrated power-on reset (POR) and power-down reset (PDR) circuits

which are always active and ensure proper operation above a threshold of 2 V.

The device remains in Reset mode when the monitored supply voltage is below a specified

threshold, VPOR/PDR, without the need for an external reset circuit.

•

The POR monitors only the VDD supply voltage. During the startup phase VDDA must

arrive first and be greater than or equal to VDD.

•

The PDR monitors both the VDD and VDDA supply voltages. However, the VDDA power

supply supervisor can be disabled (by programming a dedicated option bit

VDDA_MONITOR) to reduce the power consumption if the application design ensures that

VDDA is higher than or equal to VDD.

For more details on the power on / power down reset threshold, refer to the electrical

characteristics section in the datasheet.

Figure 4. Power on reset/power down reset waveform

1.2.2

External power-on reset and power-down reset (NPOR) of the

STM32F0x8 devices

To guarantee a proper power-on and power-down reset to the device, the NPOR pin must

be held low until VDD is valid or before turning off the supply. When VDD is stable, the reset

state can be exited by putting the NPOR pin in high impedance. The NPOR pin has an

internal pull-up connected to VDDA.

AN4080 bảng dữ liệu(PDF) 11 Page - STMicroelectronics