PM0051

Programming STM8 Flash microcontrollers

Doc ID 14614 Rev 3

17/27

The programming mode is selected through two complementary registers, FLASH_CR2 and

FLASH_NCR2.

The memory must be unlocked before performing any of these operations.

Block program operations can be performed both to main program memory and DATA area:

●

Programming a block of main program memory:

The block program operation has to be executed totally from RAM.

The program execution continues from RAM. If the program goes back to main program

memory, it is stalled until the block program operation is complete.

●

Programming a block of data EEPROM with RWW capability:

The block program operation can be executed from main program memory. However

the data loading phase has to be executed from RAM (see below).

Normal program execution can continue from main program memory, after checking

the HVOFF bit in the FLASH_IAPSR register.

●

Programming a block of data EEPROM on devices without RWW capability:

The block program operation must be executed totally from RAM.

The programming can also be performed directly through the SWIM interface. In this case, it

is recommended to stall the device in order to prevent the core from accessing the Flash

program memory during the block program or erase operation. This can be done by setting

the STALL bit in the DM_CSR2 debug module register. Refer to the STM8 SWIM

communication protocol and debug module (UM0470) for more information.

Caution:

During a block program or erase operation, it is recommended to avoid executing

instructions performing a read access to program memory.

Caution:

If the number of written memory locations is higher than what is required in the block

program/erase sequence, the additional locations are handled as redundant byte write

operations.

If the number of written memory locations is lower than what is specified in the block

program/erase sequence, the block program/erase process does not start and the CPU

stalls waiting for the remaining operations to be performed.

Caution:

EOP and WR_PG_DIS bits of FLASH_IAPSR register are automatically cleared when a

program/erase operation starts.

Caution:

If a block program or erase sequence is interrupted by a reset, the data programmed in the

memory may be corrupted.