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AN3961 bảng dữ liệu(PDF) 22 Page - STMicroelectronics |
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AN3961 bảng dữ liệu(HTML) 22 Page - STMicroelectronics |
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22 / 46 page ![]() Hardware layout and configuration AN3961 22/46 DocID022083 Rev 3 The LEDs associated with FPGA operations are described in Table 7. 3.4.1 Stored patterns The STEVAL-IME003V1 offers the possibility to memorize 16 patterns into on-board Flash memory in order to show the performance achievable at the pulser outputs. Six selectable patterns already stored in the Flash memory are preset by default, available and ready to use. A detailed description of the preset programs is listed in the tables that follow. Table 7. FPGA LEDs Color Name Description D2 Green START A program is running after START button SW5 has been pressed. D3 Green STOP The STOP button SW4 has been pressed. D4 Green IDLE The FPGA state machine is in the idle state. D5 Red ERROR An error has occurred during FPGA state machine execution. D23 Green DONE The FPGA has been successfully configured. D6-D29 Yellow PROG 0-15 The corresponding program is selected. Table 8. Program “0“ PW 5 pulses - HV0/1=±60 V; load: 300 pF//100 Ω Mode Frequency [MHz] Number of pulses Initial pulse H-bridge PRF Ch A PW 2.5 5 Positive TX0 150 µs Ch B PW 2.5 5 Negative TX0 150 µs Ch C PW 5 5 Positive TX1 150 µs CH D PW 5 5 Negative TX1 150 µs |
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