AN3404 datasheet(18/30 Pages) STMICROELECTRONICS

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General power management tips

AN3404

18/30

Doc ID 018847 Rev 3

5.5

Minimizing power consumption

The following recommendations can help the user choose the right configurations to

minimize power consumption of the device in the application:

●

Switch off all unused peripherals (peripherals are switched off by default) and use the

peripheral clock gating (PCG) feature (through the CLK_PCKENRx registers) to disable

the clock provided to the peripherals when not in use (these clocks are disabled by

default).

●

All unused pins must be connected to a defined logic level. One option is to configure

them as output low level. Make sure there are no unused I/O pins configured as a

floating input. This needlessly leads to high consumption.

●

Use Wait mode if external wakeup capability is needed in low power mode and if some

peripherals have to remain active.

●

Use the appropriate VDD value for the application. The higher the VDD value, the more

power is consumed. Thanks to the internal regulator, which supplies internal structures

of the MCU, there is no major difference in the MCU consumption but, the difference

could be visible at the application level, for example, due to the current flowing through

the pull-up resistors out of the MCU.

●

Use Active-halt and Halt modes as much as possible. To achieve this, shorten the time

spent in Run mode, for example, by using the highest clock speed in Run mode.

●

When a low power mode cannot be used, use the minimum possible frequency for the

application. Select the frequency value that meets requirements.

●

Use the dynamic control pull-up configuration if possible (see Section 5.3: Dynamic

control of pull-up resistor on page 17).

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